摘 要
在元件閘極氧化層厚度快速縮小的趨勢下，氧化層厚度薄至25Å以下時元件會因為直接穿遂效應而產生很大的閘極漏電流。因此，尋找高介電係數（High-k）閘極介電層材料以替代原先二氧化矽介電層，是當今非常重要的一個課題。然而在材料替換的過程中，所多不可預期的問題開始產生如電荷捕獲（charge traping），起使電壓（threshold voltage）飄移，載子遷移率（mobility）的下降等，因此應用在高介電係數閘極介電層元件的可靠度分析因應而生。
本論文我們選擇利用電荷汲引量測技術為架構發展出幾套可以觀察High-k材料使用後所造成的影響：chapter 3.能隙中不同能量的界面陷阱密度分佈量測，chapter 4.邊緣界面陷阱密度縱向深度分佈量測，利用這樣的量測可以解析出本身材料特性或是製程技術變異所引發的電特性改變原因。本研究的最後我們再提兩個電荷汲引量測技術應用在較新進的二氧化矽電晶體上的可靠度分析：chapter 5.1超薄氧化層電晶體界面陷阱密度量測，chapter 5.2側向氧化層缺陷分佈萃取技術，利用功能強大的電荷汲引技術，我們可以輕易的從量測到的電荷汲引曲線獲得所要結果，且不需要繁雜的數值模擬就可求得先進電晶體元件的界面陷阱密度大小及分佈，利用這樣的方式可以做為我們日後在判斷製程好壞的依據。

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