摘要
近年來，由於消費者對輕薄短小及高效能電子產品有很高之需求，致使電子元件構裝發展走向高密度、微型化及多元化。在傳統的構裝中，晶片間的電訊傳輸多以打線為主，但打線過長常易發生電訊延遲現象。為了減少電訊延遲以增加電性效能，三維晶片堆疊構裝技術因而產生。此技術係藉由晶片垂直堆疊方式，使構裝體達到微小化，並可將不同性質之元件(高頻無線通訊元件、記憶體、邏輯元件、感測器及影像處理之元件)等異質整合在單一構裝體中，提高電性效能。因晶片堆疊及構裝微型化之關係，構裝整體消耗功率亦相對提升，而構裝體高功率密度易造成晶片之局部高溫甚至熱集中點之現象，造成晶片內部結構破壞與電訊傳遞失效。因此，如何改善構裝之散熱效能，已經成為電子構裝產學研各界重視之研發課題。
本論文主要是針對含矽穿孔三維晶片堆疊構裝進行散熱效能研究。首先，本論文利用有限單元分析套裝軟體ANSYSTM建立含單一矽穿孔晶片單元結構等效熱傳導係數分析模型，並進而探討矽穿孔直徑、高度、間距、二氧化矽層厚度與陣列矽穿孔數目等因子對含矽穿孔晶片等效熱傳導係數之影響。應用所建立之含矽穿孔晶片等效熱傳導係數分析模型，本論文接著以工研院所開發之內含矽穿孔晶片三維堆疊四方扁平構裝為對象，探討其在自然對流環境下之散熱效能，其中導線層則以材料混合法則建構等效熱傳導係數分析模型。數值計算所得之晶片接面溫度與紅外線熱像儀及熱瞬態測試儀之量測值相互驗證，結果頗為脗合，顯示本論文建立之含矽穿孔晶片等效熱傳導係數及含矽穿孔三維晶片堆疊構裝有限單元熱傳分析模型之準確性及適用性。
最後，本論文藉由上述已確認之含矽穿孔三維晶片堆疊構裝有限單元熱傳分析模型分析內含多層矽穿孔三維晶片堆疊構裝之散熱效能並探討不同材料熱傳導係數、晶片厚度、基板面積、基板厚度、玻璃厚度、矽穿孔直徑、高度及二氧化矽層厚度等參數對其晶片接面溫度之影響。本論文成果將可供相關研究人員進行含矽穿孔三維晶片堆疊構裝散熱設計之參考。

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