90nm製程以後，能適用於內嵌式非揮發性記憶體面臨了電容耦合與閘極氧化層漏電等等問題，其解決方式的技術難度過高，且無真正有效的方式出現於國際論文。此篇論文則是提出另一角度的方式去創造出新式非揮發性記憶體元件，此元件無須特殊製程與光罩，採用了兩個電晶體本身寄生的間隙壁，產生了自我對準的氮化矽，提供電荷儲存區。過去產業界提出的電荷儲存區絕大多數都需要特殊且複雜的製程，不但成本過高，在90奈米製程就無法克服元件過小帶來的缺點。但本篇論文的創意元件，則是提供內嵌式非揮發性記憶體元件另一種選擇考量，此元件符合低功率、製程簡易、面積小與無閘極氧化層厚度考量等四大優點，也擁有非揮發性記憶體最要求的高持久資料保存特性。
本元件結構屬於為P通道邏輯製程記憶體，可有效率將熱載子注入儲存層中，利用二維製程及電性模擬軟體分析元件基本特性。最後，我們也成功讓此“Self-Aligned Nitride OTP Cell”概念實現於90奈米、65奈米以及前瞻45奈米的邏輯製程中，相對於傳統的內嵌式非揮發性一次性寫入記憶體在製作成本及元件縮小性上確實有相當大的改進及優勢。

After 90nm technology, some constraints like coupling noise and leakage of gate current must be overcome in embedded non-volatile memory. Many methods have been presented but no effective solutions work. A new p-channel nitride-based One Time Programmable (OTP) memory has been developed in this thesis. This new cell was fabricated by CMOS logic process without any extra mask or process step. This cell with a small cell size is composed of two PMOS transistors in series with a parasitic self-align nitride storage node that is formed by the merged spacers. In recent years, all kinds of new NVM cells have been presented especially by using nitride layer as storage node. But most of them need special and complex process which may obtain lots of cost to overcome during scaling down. This novel cell provides a promising solution for embedded NVM beyond 90nm node. The cell also exhibits low power, small cell size, excellent data retention capability, and which is fully decoupled with gate oxide for high scalability achievement.
The novel structure is a p-type memory cell which can inject charges to the storage layer more efficiently. In this work, the 2-dimension simulation software (TCAD) is used to observe the fundamental principle to prove the practicability of the novel structure. Finally, we successfully realized the “Self-Aligned Nitride” OTP cell in 90nm, 65nm and even advanced 45nm technology. Comparing to traditional one-time programmable memory cells, the novel structure has ascendancy and good improvement on cost and scalability.

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