帕金森氏症是一種常見的神經失調疾病，由於神經細胞的退化，使得神經的運動調節功能喪失，導致患者產生身體不規律顫抖、運動遲緩等症狀。深層腦部電刺激是將電極植入病患腦部的特定區域，藉由提供特定頻率的電刺激，來有效地抑制腦部不正常的神經電訊號或刺激神經細胞活性。
近幾年來，人們致力於發展植入式腦機介面系統。腦機介面系統結合了記錄單元與刺激單元，藉由記錄單元偵測腦中異常訊號來進行病情診斷，並利用刺激器提供相對應的電刺激訊號來進行深層腦部電刺激，以抑制腦部不正常放電，而其無線傳輸方式的設計則可避免裝置穿過病患皮膚可能造成的感染。植入式裝置必須操作在低電壓下，以符合低功耗的需求，但仍須產生高電壓以供刺激，因此在系統中需要升壓電路來將低供應電壓轉換成高電壓。
本論文提出一個應用於腦機介面中，可提供深層腦部電刺激治療的電壓可調式神經刺激器。採用電荷幫浦作為升壓電路，並藉由回授機制調整輸出電壓，可藉由5 位元的電壓控制訊號來改變刺激電壓，在僅需1V供應電源的情況下，可提供3V~8V的輸出電壓。此架構的優勢在於其並非僅調整刺激輸出的電壓，而是調整升壓電路所產生的電壓，藉由電路自行依刺激所需升壓，可節省升壓過程中的功耗，而達到省電的效果。此外，本論文使用可整合於標準製程中的耐高壓電晶體─汲極延伸金氧半場效電晶體，來做為刺激電壓輸出端的切換開關，以提供雙向的輸出。
本系統於TSMC 0.18μm CMOS 製程實現，經由量測驗證晶片並與模擬結果比較，分析並提出更進一步的改良方式。

Parkinson’s disease (PD) is a common neurodegenerative disorder. The motor symptoms such as tremor and bradykinesia result from the degeneration of dopaminergic neurons in the substantia nigra. Deep brain stimulation (DBS) is a new therapy for Parkinson’s disease. By implanting electrodes to particular regions of the brain and giving electrical impulses with specific frequency, DBS can suppress the abnormal electrical impulses and induce neuronal activity.
The brain machine interface (BMI) consisting of both recording unit and stimulator are well developed. BMI can record and detect the abnormal signal in brain of the patient, and then, give the corresponded stimulation. Without wires penetrating animal bodies, the wireless implanted device can prevent patient from infection, while the operating voltage should be lower to reduce power consumption. However, the stimulator has to provide high voltage for effective stimulation, so a voltage multiplier is indispensable.
This work proposes a voltage-tunable stimulator combined with CMOS-compatible high-voltage transistors, i.e. drain-extended MOS (DEMOS). With a supply voltage of 1V, the output voltage can vary from 3V to 8V, according to 5-bit digital control signal. This design has low power consumption because the charge pump circuit adjusts output voltage automatically. Therefore, the proposed stimulator is suitable for applications in implanted brain machine interface. Applying DEMOS allows it to be integrated with the BMI system in one chip. Two test chips are implemented in a TSMC 0.18μm CMOS process to verify the proposed stimulator design.

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