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研究生: 李世偉
論文名稱: 批次機台多屬性之最適生產因素探討與模擬─ 以爐管與酸槽為例
A Simulation Study of Suitable Processing Factors for Batch-Process Workstations with Multiple Attributes - A Case Study of Furnace and Wet Bench Operations
指導教授: 劉志明
Chih-Ming Liu
口試委員:
學位類別: 碩士
Master
系所名稱: 工學院 - 工業工程與工程管理學系
Department of Industrial Engineering and Engineering Management
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 76
中文關鍵詞: 批次製程機台單晶片製程機台系統模擬田口方法緊急訂單比例生產週期時間
外文關鍵詞: Discrete-event simulation, Taguchi methods, Batch process machine, Single wafer process machine, Hot lot ratio, Cycle time
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  • 由於晶圓製造生產流程相當的複雜,具有再回流、重工、產品組合不同與緊急訂單等等的特性與問題,加上各種不同加工型態的機台,這些因素造成生產管理上相當的困難。且由於晶圓製造的機台設備、材料成本昂貴,因此晶圓製造業者往往都以提高機台的利用率來追求系統最大產出為目,然而也會造成在製品過多與生產週期時間拉長的現象。
    在晶圓的生產製造過程,需經過各種不同型態的機台加工,其中在批次製程機台的生產週期時間大約占了整體生產週期時間的25%~30%。一般而言,批次製程機台是以其較佳的經濟規模而達到較低的生產成本,卻不利於系統的生產週期時間;反之,單晶片製程機台在生產週期時間上具有相當大的優勢。然而,單晶片製程機台在機台成本以及產出效率上通常不及批次製程機台。在成本與效益上的取捨上是一般晶圓製造廠業者不願意以單晶片製程機台全面取代批次製程機台的主要原因。
    本論文將探討在相同設備成本的前提下,考慮不同生產條件,試圖找出系統生產週期時間最低的機台型態配置組合。本論文係以系統模擬的方式,結合田口方法分析影響系統生產績效的重要變異因素,如:緊急訂單比例、產品組合、等候時間限制等變異因素,以瞭解各因素的重要程度與彼此間的關係。再透過敏感度分析來探討不同生產條件下機台型態的配置對於系統生產週期時間的影響,以決定符合成本限制下的最適生產條件的組合。


    Semiconductor wafer fabrication facilities face a variety of challenges. The combination of shrinking device geometries and increasing interconnect levels is rapidly increasing process complexity. It is leading to higher manufacturing costs and longer cycle times.
    Cycle time is one of the most important issues in semiconductor industry. In wafer fabrication processes, batch process steps account for approximately 25%~ 30% of the overall cycle time. This is caused by the long process times, batch sizes, hot lots and the batching rule of the batch process. These batch processes machines such as furnace and wet bench has major impact on the total cycle time.
    Comparing to batch process machines, single wafer process (SWP) machines enable shorter cycle time to promote faster product development, quicker ramp up of new products and earlier yield correction leading to economic benefits. However, the cost/benefit tradeoff is the major concern for a Fab to replace batch process machines with single wafer process machines.
    This study uses discrete-event simulation and Taguchi methods to investigate optimal process factors (i.e. hot lot ratio, batching rule, time constraint, and etc) of batch process in furnace and wet bench areas. Results of simulation proved the batch process in furnace area and hot lot ratio have major impact on cycle time.
    This study attempts to find an optimal combination of batch process and single wafer process machines in furnace area. And given the same cost, an optimal combination of batch process and SWP machines can be found to reduce normal lot cycle time by 4.0~4.5% and hot lot cycle time by 6.1%~16.4%, and increase batch process capacity efficiency by 15.3%~~23.4%.
    The result of the study provides managers insights for the cost-effect of single wafer process machines. And the methodologies proposed can be used by practitioners to support the decision making for adopting single-wafer process machines.

    誌謝 I 摘要 II Abstract III 圖目錄 VI 表目錄 VII 第一章 緒論 1 1.1 研究背景與動機 1 1.2 研究目的 3 1.3 研究範圍、假設與限制 4 1.4 論文架構 5 第二章 文獻探討 8 2.1 批次機台派工法則 8 2.2 單晶片製程機台與批次機台比較 10 2.3 緊急訂單 14 2.4 影響生產週期時間之因素 17 2.5 生產成本 20 2.6 系統模擬法 22 2.6.1 模擬之簡介 22 2.6.2 模擬之分類 23 2.6.3. 模擬之優、缺點 24 2.7 本章小結 25 第三章 問題定義與模式建構 26 3.1 問題定義與分析 26 3.2 整體架構與邏輯 27 3.3 模式建構 29 3.3.1 變異因素分析與選擇 29 3.3.2 選擇因數水準與田口方法參數設計 30 3.3.3 建構生產模擬系統 31 3.4 實驗結果分析 35 3.4.1 田口方法:信號雜音比(Signal to Noise ration;SN Ratio) 36 3.4.2 變異數分析(Analysis of variance;ANOVA) 36 3.5 敏感度分析 38 3.6 本章小結 38 第四章 實例驗證 39 4.1 案例公司簡介 39 4.2 模擬模型建構 39 4.2.1 實際資料蒐集 39 4.2.2 模擬模型之基本資料 40 4.2.3 變異因數確認與設計實驗 42 4.3 實驗結果分析 45 4.3.1 生產週期時間(Cycle time) 45 4.3.1.1 生產週期時間--SN Ratio分析 47 4.3.1.2 生產週期時間--變異數分析 52 4.3.2 晶圓在製品(work in process;WIP) 54 4.3.2.1 晶圓在製品--SN Ratio分析 54 4.3.2.2 晶圓在製品--變異數分析 56 4.4 敏感度分析 57 4.4.1 參數設定 58 4.4.2 敏感度模擬結果分析 60 4.5 產能效率(capacity efficiency) 分析 64 4.5.1 經濟效益分析(economic analysis) 66 4.6 本章小結 68 第五章 結論與建議 70 5.1 結論 70 5.2 未來研究方向 71 參考文獻 72

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    中文部份
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    [9] 簡禎富,施義成,林振銘,陳瑞坤編著,「半導體製造技術與管理」,國立清華大學出版社,民國94年。

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