我們在此篇論文中提出ㄧ個針對移動補償功能的全硬體化加速器，以支援H.264/AVC 主要檔次之解碼器能夠達到即時解碼(每秒至少解三十張)四倍高清晰度(4xHD/QFHD)大小的影像。此加速器主要特色為減少記憶體資料流量並且增加計算平行度，其中是分別透過以下兩種方法來達成。第一，我們提出ㄧ個高效率參考畫面預先提取系統，來將記憶體存取的行為模式重新組合，以達到減少記憶體資料流量之目的。第二，我們使用一組在P區段和B區段都能夠充分運作，並且不因同步問題而產生副作用的雙內插引擎以加速內插運算。最後，透過實驗結果可知，我們所提出的設計可減少百分之九十一的記憶體存取執行週期，以及平均百分之七十九的計算執行時間。

Motion Compensation (MC) is the computation bottleneck in H.264/AVC decoding and it dominates DRAM traffic. To alleviate computation loading, we employ two interpolation engines and fully utilize them in both P and B slices. Compared with a traditional separate 1-D interpolation engine, our proposed approach can reduce 79% of average computation latency. To reduce memory traffic, we propose a High Efficiency Reference Frame Pre-Fetch Scheme (HERPS) that saves 91% of multiple reference frame memory access cycles by rearranging access patterns. The overall design costs 117K gates when running at 200MHz and supports up to the QFHD (3840x2160) at 30 frames per second (fps) using a 128-bit DRAM memory system.

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