傳統的非揮發性記憶體是利用複晶矽浮動閘極(floating gate)作為載子儲存的單元，而在元件尺寸持續微縮下，此結構將面臨一些瓶頸。為了克服尺寸極限，近年來衍生出之奈米晶體非揮發性記憶體，即利用半導體或金屬奈米點作為電荷儲存的單元，可以減少穿隧氧化層的厚度，而不損失可靠性，進而降低操作電壓及操作速度增快。
在此論文中，我們利用共蒸鍍方式將鎳金屬埋在氧化系和氮化矽的介電質中，並且藉由快速熱退火系統來減少熱預算進而降低擴散程度，當選擇不同的退火溫度時，能造成奈米點結構上的改變，我們認為退火的溫度是最主要的影響，同時我們也有研究在濺鍍鈷化矽的薄膜過程中通入氣體(O2/N2)，可以發現不只退火溫度會影響奈米點的形成機制，在濺鍍過程中通入的氧氣流量也扮演一個重要的腳色。

Chapter 1
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