由 Berrou等人於 1993 年提出的渦輪碼是近期編碼理論重要的發展之一。由於接近薛農極限的優良表現，在 3GPP 中被選擇為 Dedicated 通道傳輸中的錯誤更正碼。渦輪碼是由兩個或多個遞迴系統迴旋碼 (recursive systematic convolutional code) 所構成，編碼器間則由交錯排列器 (interleaver) 來做平行鏈結。渦輪解碼器則是由兩個軟式輸入輸出解碼器組成，兩者之間以交錯排列器及反交錯排列器　（deinterleaver） 連接。而使渦輪碼能提供優良的表現主要是交錯排列器及重複解碼 (iterative decoding)。 主要的軟式輸出的演算法則，主要可分為最大事後機率 (MAP) 以及最有可能路徑 (ML path) 兩大類的軟式輸出演算法。在這篇論文中，我們主要介紹並應用一個整合性的反溯解碼架構及雙反向處理器，再加上有關溢位 (overflow) 和定點數 (fix-point) 的量化 (quantization) 等問題的解決方法。前者的架構能使我們設計上能利用同一種設計流程設計不同的演算法，且不同的演算法也能使用類似的硬體區塊，進而縮短硬體設計的時間且提供一個相異演算法硬體結合的方法。而後者的處理器運用兩個反向處理器，能有效利用運算的延遲時間，進一步降低運算的複雜度，是有效的硬體空間與運算時間上的交換。最後我們將透過一個範例，利用最大值及對數化最大事後機率 (Max-Log MAP) 的演算法來說明設計的流程，並透過模擬來說明設計的表現。文末則提出運算速率的關鍵及未來設計上值得改善的地方。

Turbo codes, which are considered as the most important research topic in the coding theory in recent yesrs, were proposed by Berrou, Glovieux, and Thitimajshima in 1993. It has a near-capacity bit error rate performance at low signal-to-noise ratios with acceptable computation complexity. A turbo decoder consists of two (or more) soft-output decodes connected by an interleaver and a deinterleaver. In this thesis, we propose a hardware structure for soft-output decoders with a unified algorithm and a two-backward-processor scheme. The unified algorithm offers a flexible structure suitable for different trellis-based soft-output algorithms. And the
two-backward-processor architecture can be used to deal with the

problem of long time delay. Finally, we provide a hardware design and give an example of the decoder structure for the third generation mobile communication systems.

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