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研究生: 江宜哲
Chiang, Yi-Je
論文名稱: 嵌入式系統設計方法中的元件屬性解法
Attribute Resolution for Component-Based Design of Embedded System
指導教授: 周百祥
Chou, Pai H.
口試委員: 謝孫源
Hsieh, Sun-Yuan
游創文
You, Chuang-Wen
韓永楷
Hon, Wing-Kai
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊系統與應用研究所
Institute of Information Systems and Applications
論文出版年: 2022
畢業學年度: 110
語文別: 英文
論文頁數: 41
中文關鍵詞: 屬性解元件式設計嵌入式系統555計時器克希荷夫電壓定律克希荷夫電流定律
外文關鍵詞: Attribute Resolution, Component-Based Design, Embedded System, 555 Timer IC, Kirchhoff Voltage Law, Kirchhoff Current Law
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  • 本論文提出了一種方法,以確定通過連接現成元件(COTS)設計的嵌入式系統架構的可行組態。現成的元件提供了定義明確、經過充分測試的功能,且可以被組成完整的系統。然而,問題已經從重複實現轉向組態,這需要確定屬性值,以便選擇正確的功能來啟動或停用。不幸的是,這些COTS組件日益增長的複雜性和更高層次的整合使得配置成為一項日益複雜、容易出錯的任務。由於元件之間的相互聯繫,進一步限制了不同元件的屬性,這使得問題更加嚴重。

    我們提出自動化的屬性解來實現這種基於元件的嵌入式系統設計的組態設定。底層電路圖中接腳對接腳的詳細連結被建模為由元件模型和電氣連接所形成的代數方程式,並使用代數求解器求解所產生的方程式組合。

    本論文通過對兩個用現實生活中的COTS元件設計的嵌入式系統的案例研究,展示了所提方法的可行性。實驗結果表明,我們的方法是穩健的,可以消除設計者今天由於手工計算而產生的許多複雜的錯誤。


    This thesis proposes a way to determine a feasible configuration for embedded system architectures designed by connecting commercial off-the-shelf (COTS) components. Components offer well- defined, fully tested functionality that can be composed to form complete systems. However, the problem has shifted from re-implementation to configuration, which entails determination of attribute values so as to select the right function to activate or disable. Unfortunately, the growing complexity and higher-level integration of these COTS components makes configuration an increasingly complex, error-prone task. The problem is exacerbated by the additional interactions between components due to their interconnectivity, which further constrain the attributes of different components.

    We propose to automate the configuration of such component-based embedded system designs by automating the resolution of attributes. The detailed pin-to-pin connections at the schematic level are modeled as algebraic equations formed from the component models and the electrical connections. The resulting system of equations is then solved using an algebraic solver.

    This thesis shows the feasibility of the proposed approach with a case study of an embedded system designed with real-life COTS components. Experimental results show our approach to be robust and can eliminate many intricate errors that designers make today due to manual calculations.

    1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.2 Contributions . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . 3 2 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . .4 2.1 Component Modeling . . . . . . . . . . . . . . . . . . . . . .4 2.2 Constraint Solution for Embedded Systems Design . . . . . . . 5 2.3 Computer-aided Design . . . . . . . . . . . . . . . . . . . . 6 3 Design Concepts . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.1 Block vs. Component . . . . . . . . . . . . . . . . . . . . 8 3.1.2 Ports and Links . . . . . . . . . . . . . . . . . . . . . . 9 3.1.3 Portcomp vs. Portblock . . . . . . . . . . . . . . . . . . .9 3.1.4 Links and Slots . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Tag Relations and Attributes . . . . . . . . . . . . . . . . .10 3.2.1 Tag Entanglement . . . . . . . . . . . . . . . . . . . . . .11 3.2.2 Attribute Modeling . . . . . . . . . . . . . . . . . . . . .11 3.2.3 Configuration . . . . . . . . . . . . . . . . . . . . . . . 12 4 Problem Statement . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 Graph Formulation . . . . . . . . . . . . . . . . . . . . . . 13 4.1.1 Tripartite Graph . . . . . . . . . . . . . . . . . . . . . .13 4.1.2 Algebraic Attributes of Components . . . . . . . . . . . . .14 4.2 Schematic-Level Attribute Resolution . . . . . . . . . . . . .15 5 Technical Approach . . . . . . . . . . . . . . . . . . . . . . .17 5.1 Graph Iteration for Nets to Equations . . . . . . . . . . . . 17 5.2 Solving Equations with Algebra . . . . . . . . . . . . . . . .18 6 Case study . . . . . . . . . . . . . . . . . . . . . . . . . . .21 6.1 Timer555 . . . . . . . . . . . . . . . . . . . . . . . . . . .21 6.1.1 Pin Configuration of Timer555 . . . . . . . . . . . . . . . 21 6.1.2 Adjustable Blinking LED Circuit . . . . . . . . . . . . . . 22 6.1.3 Model Traffic Lights Circuit . . . . . . . . . . . . . . . .28 7 Conclusions and Future Work . . . . . . . . . . . . . . . . . . 35 7.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . 35 7.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . 35 A Nets (from Net8 to Net14) in Model Traffic Lights Circuit . . . 39

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