CMOS-MEMS主要是利用半導體製程來同時整合微小機械結構與電子電路在單一晶片中，其優勢在於系統整合之能力以及半導體製程的精準線寬，使MEMS與半導體CMOS製程相整合而具備有半商業化的優勢。
本研究之主題在於利用TSMC 0.35μm 2P4M CMOS的標準製程來設計製造與量測一出平面加速度感測器，本研究不同於以往CMOS-MEMS的地方在於整合濕蝕刻製程以達到次微米的極小感測電極間距，同時結構能夠符合完全差分式(Fully differential)電容感測介面，本論文之機械結構搭配整合於晶片上的CMOS感測電路使得此加速度感測器成為一個完整的感測器元件。本論文最後整合了出平面加速度計與舊有的同平面加速度計整合成一三軸感測加速度計晶片。

This thesis presents a novel CMOS-MEMS out-of-plane linear accelerometer. This capacitance type accelerometer contains special designed gap-closing sensing electrode arrays with on-chip fully differential sensing circuits. Moreover, the comb-finger electrodes have the characteristics of high fill-factor and sub-micron gap to increase the sensing capacitance. Thus, the sensitivity and signal to noise ratio can be further improved. This study has established a post-CMOS wet-etching process to realize the accelerometer with sensing electrodes of sub-micron gap in the out-of-plane direction. The present accelerometer has been demonstrated using the standard TSMC 2P4M process plus the post-release technique. This study also integrates previous in-plane linear accelerometers to fabricate a fully differential 3-axes accelerometer chip.

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