根據電路佈局中各個模組不同的需求供給其不同的電壓，多重電壓分佈(multiple power domain)為一個可同時減少晶片消耗能源並保持其效能不變之技術。在二維晶片的架構中，混合整數線性規劃(mixed integer linear programming)常作為實現多重電壓分佈的主要方法之一。但是，目前的方法多考慮僅在二維晶片上實現多重電壓分佈為其主要目標。由於二維晶片與三維晶片的架構明顯不同，若要將專為二維晶片設計的方法直接移植到三維晶片上使用，則必須加以改良，增加考慮一些不同的因素才能發揮效果。為了解決三維晶片上特有的問題，我們根據由陳賢德博士所提出的堆疊穿透矽通道分發網路-STDN (Stacked-TSV Distributed Network)提出了對應於二維晶片中電壓島(voltage island)的電壓冊(voltage volume)的概念。根據對MCNC測試電路的實驗，實驗結果顯示了電壓冊結合堆疊穿透矽通道分發網路能夠達成良好的3D佈置(floorplan)、IR壓降、電源干擾、溫度、使用面積和信號連接的總長度。

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