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研究生: 王勝弘
Wang, Sheng-Hong
論文名稱: 矽離子佈植改善4H-SiC氧化製程之實驗
Experimental Study of 4H-SiC Oxidation Process with Si Implantation
指導教授: 黃智方
Huang, Chih-Fang
口試委員: 崔秉鉞
Tsui, Bing-Yue
吳添立
Wu, Tian-Li
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2018
畢業學年度: 106
語文別: 中文
論文頁數: 51
中文關鍵詞: 碳化矽氧化製程電子遷移率離子佈植
外文關鍵詞: 4H-SiC, ThermalOxidation, ChannelMobility, Implantation
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  • 碳化矽金氧半場效電晶體的場效電子遷移率過低(5~10cm^2/V∙s)一直是碳化矽元件最大的缺點,近年來已經發展出使用氧化後一氧化氮熱退火可以讓電子遷移率有效提升至約30cm^2/V∙s,而本論文提出在氧化製程前進行矽離子佈植的方式來改善氧化層品質,希望藉此開創出新的提升場效電子遷移率的方法。
    論文中我們在氧化前先進行一次低能量、低劑量的矽離子佈植,不經過離子佈植後退火,接著在1150℃、乾氧環境下持續6小時閘極氧化製程,不進行一氧化氮熱退火,製作碳化矽金氧半場效電晶體與金氧半電容,並以純乾氧的標準閘極氧化製程作為實驗對照組,實驗結果發現經過氧化前矽離子佈植試片其電子遷移率由6.38cm^2/V∙s提升至7.59cm^2/V∙s。藉由電荷汲引方式量測得知平均表面缺陷密度也由4.079×10^12 eV^(-1) cm^(-2)下降到3.764×10^12 eV^(-1) cm^(-2),且沒有閾值電壓飄移的問題。


    Low field effect mobility (5~10 cm^2/V∙s) is one of the main challenges of SiC MOSFETs. Post-oxidation annealing in NO has been developed to enhance the mobility to about 30cm^2/V∙s in previous studies. In this study, silicon ion implantation before thermal oxidation is proposed as a novel method to improve the channel mobility of SiC MOSFETs.
    The silicon ion implantation process applied in this study is of low energy and low dose, without post-implantation annealing. This implantation process is followed by a gate oxidation in dry O2 at 1150℃ for 6 hours, without NO annealing. Compared to the control sample without pre-oxidation implantation process, the field effect mobility is increased from 6.38cm^2/V∙s to 7.59cm^2/V∙s, and the interface trap density is reduced from 4.079×10^12 eV^(-1) cm^(-2) to 3.764×10^12 eV^(-1) cm^(-2) from charge pumping measurements. In the meantime, no additional threshold voltage shift is caused by the new process.

    摘要 I Abstract II 目錄 III 圖目錄 VI 表目錄 IX 第一章、 序論 1 1.1、 碳化矽材料介紹 1 1.1.1、 碳化矽組成 2 1.2、水平型金氧半場效電晶體 3 1.3、文獻回顧 3 1.3.1、氧化後退火提升通道電子遷移率 3 1.3.2、超高溫氧化 4 1.3.3、氧化前離子佈植 5 1.4、動機與論文大綱 6 第二章、元件介紹與實驗設計 8 2.1、水平型MOSFET介紹 8 2.2、離子佈植技術 9 2.2.1、基極離子佈植 9 2.2.2、源極、汲極離子佈植 10 2.2.3、佈植後退火 11 2.2.4、Si離子佈植 11 2.3、碳化矽氧化機制 12 2.4、元件介紹與試片分配 13 2.5、電荷汲引 15 2.5.1、電荷汲引原理及操作 16 2.5.2、電荷汲引量測模式 18 第三章、實驗製程 20 3.1、一般清潔(Normal Clean) 20 3.2、定義對準鍵及黃光製程(Alignment key& Lithography) 21 3.3、基極區離子佈植(Body Implantation) 22 3.4、源極與汲極區離子佈植(Source Drain Implantation) 22 3.5、電性活化(Activation) 23 3.6、矽離子佈植(Silicon Implantation) 23 3.7、元件隔絕區(Isolation) 24 3.8、閘極氧化(Gate Oxidation) 24 3.9、源極、汲極歐姆接觸(Source,Drain Contact) 25 3.10、基極歐姆接觸(Body Contact) 25 3.11、快速熱退火(RTA) 26 3.12、閘極金屬與墊金屬(Pad Metal) 26 第四章、實驗數據整理討論 28 4.1、垂直電容量測 28 4.2、歐姆接觸量測 33 4.3、順向電流量測 36 4.4、電荷汲引量測 39 4.5、變溫電性量測 44 第五章、結論與未來展望 48 參考文獻 49

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