在積體電路中鍺材料被視為取代矽作為通道半導體之優選材料，但鍺材料仍有許多方面需要進行改善。例如:介面工程。本實驗利用低溫微波進行沉積後退火，並且引入額外氧原子來修復氧空缺之缺陷及鍺懸浮鍵，優化介面品質，以及探討Al2O3及Hf3N4介面層介面層及改善n+/p接面對鍺的影響。除此之外，我們也成功製作鰭式電晶體來提升電特性，及抑制短通道效應。
實驗首先對不同介面層和高介電層上進行低溫微波通氧沉積後退火做研究，文獻報導經過MTO (Microwave Thermal Oxidation, MTO)處理可降低氧化層之缺陷，而PDMTO (Postdeposition Microwave Thermal Oxidation, PDMTO)處理可減少介面缺陷。結果得知，元件經過兩次之低溫通氧氣微波退火時，不僅形成適當之GeOx厚度，亦增進HfON轉成Tetragonal phase，因結晶性提升，提高介電層之k值後，進而使EOT降低，同時擁有較佳之可靠度特性。
接下來，實驗使用穩定之Al2O3高介電保護層，來抑制在製程上所形成介面之損傷，以及擁有高熱穩定性之含氮Hf3N4介面層，分別比較Al2O3、ZrO2/Al2O3、ZrO2/Hf3N4及介面優化後之ZrO2/Hf3N4作為閘極介電層的n型鍺平面式電晶體之特性。優化閘極介電層之ZrO2/Hf3N4，電特性展現EOT為0.82 nm、ΔVfb=40 mV及閘極漏電流密度(VG=Vfb-1V)為3×10-3 A/cm^2。在電晶體方面，其展現次臨界擺幅(S.S)為137 mV/dec，及電流開關比約為6.2x10^2。在n+/p接面漏電流方面，因熱預算過高及鍺材料本身之缺陷所導致電特性較差之情形。
實驗最後為了減少製程上之熱預算，以低溫微波退火技術來活化淺接面。在nMOSFETs方面，介面優化後之閘極介電層ZrO2/Hf3N4，其EOT為0.90 nm、ΔVfb=40 mV，及閘極漏電流密度(VG=Vfb-1V)為6×10^-4 A/cm^2元件之S.S為110 mV/dec，而電流開關比約為1.5x10^3。為了增進電晶體特性，故我們使用epi-GeOI基板製作出nFinFETs，離子佈值活化完進行量測。其元件之S.S為102 mV/dec，及展現較低的閘極漏電流特性，而電流開關比約為4.1x10^4，相較於nMOSFETs之電流開關比2.7x10^1，提高約3個數量級。

Germanium is regarded as the most promising candidate of channel material, which is possible replacements for Si in n-channel FETs. However, some issues should be resolved, such as interfacial quality. In this thesis, for forming interfacial layers of high quality, postdeposition thermal oxidation was applied in O2 ambient by a microwave, which can provide extra oxygen to repair the oxygen vacancies and decrease Ge dangling bonds. Besides, the effects of the Al2O3 and Hf3N4 interfacial layers and passivation of n+/p junctions in Ge are studied. In addition, Ge nFinFETs were also fabricated to obtain better electrical characteristics and suppress the short channel effect.
First, the effects of postdeposition thermal oxidation in O2 ambient with a microwave on interfacial and high-k layers of Ge MOS devices are investigated. It was reported recently that the oxide layer traps can be reduced by MTO, the interface traps can be minimized by PDMTO. GeOx could be formed with suitable thickness by using MTO and PDMTO treatments. the high-k value of HfON can be increased due to the crystallinity enhancement of tetragonal phase. Then, both lower EOT and better reliability characteristics in Ge p-sub MOS devices are obtained.
Second, Al2O3 and Hf3N4 as interfacial layer are applied for passivating high-k gate dielectric to reduce the interface traps and obtain the high thermal stability, respectively. Gate dielectrics of Al2O3, ZrO2/Al2O3, ZrO2/Hf3N4 and optimized ZrO2/Hf3N4 on Ge nMOSFETs were investigated The results show that the Ge MOS capacitor with optimized ZrO2/Hf3N4 gate dielectric exhibits an EOT of 0.82 nm, ΔVfb of 40 mV and the lowest gate leakage density of 3×10^-3 A/cm2. Results of Ge nMOSFETs show a subthreshold swing of 137 mV/dec and on off ratio of 6.2x10^2. The electrical characteristics of Ge nMOSFETs are not good due to the n+/p junction leakage caused by the over thermal budget and intrinsic defects.
Finally, a microwave annealing with less thermal budget was utilized to activate shallow junction. The Ge nMOSFETs with optimized ZrO2/Hf3N4 gate dielectric and a microwave activation show EOT of 0.9 nm, ΔVfb of 40 mV, gate leakage density(VG=Vfb-1V) of 6×10-4 A/cm^2, S.S. of 110 mV/dec, and on-off ratio of 1.5 x10^3. In order to further enhance electrical performance, Ge nFinFETs were fabricated with epi-GOI wafer. A subthreshold swing of 102 mV/dec, low gate leakage current, and on-off ratio of 4.1x10^4 in nFinFETs without metallization are achieved. The on-off ratio of Ge nFinFETs can increase approximately 3 orders compared to that of nMOSFETs.

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