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研究生: 左定強
論文名稱: 即時區塊性梯度域高動態範圍壓縮之設計與實現
Design and Implementation of Real-Time Block-Based Gradient Domain High Dynamic Range Compression
指導教授: 邱瀞德
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 產業研發碩士積體電路設計專班
Industrial Technology R&D Master Program on IC Design
論文出版年: 2007
畢業學年度: 95
語文別: 英文
論文頁數: 55
中文關鍵詞: 高動態範圍影像色調對應即時區塊性梯度域高動態範圍壓縮演算法數位影像視訊處理梯度帕松方程式離散正弦轉換
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  • 近年來由於高動態範圍影像與視訊的擷取技術發展相當的訊速,所以如何將此高動態範圍影像或視訊顯示於一般傳統LCD上成為一個重要的研究主題,過去已發展的色調對應演算法將高動態範圍影像轉換為低動態範圍影像以便在傳統LCD顯示,但此演算法由於需花費較長的計算時間,以至於不適用於視訊上的處理。本論文目的在設計與實作即時區塊性梯度域高動態範圍壓縮演算法,改良一般色調對應演算法,使適合應用於數位影像視訊處理。
    選擇在梯度域將高動態範圍壓縮成低動態範圍,是因為其具有很高的壓縮效果,並且能明顯保留住影像的細節,我們將一張高動態影像/視訊畫面等份的切割成相同大小的區塊,並且對每一個影像區塊做修改後的梯度域高動態範圍壓縮處理,由於影像區塊中細節的部份在數學上代表著較小的梯度,所以我們對小的梯度做微量衰減,以維持影像的區域性對比,並盡可能的帶出細節的部份,而對大的梯度做強度較高的衰減來壓縮動態範圍,最後藉由求解帕松方程式以衰減處理後的梯度重建出空間域中低動態範圍影像。
    本論文提出一計算效率高的即時離散正弦轉換硬體架構以實作求解帕松方程式,並且以Verilog HDL實現即時區塊性梯度域高動態範圍壓縮硬體電路,以TSMC 0.13um製程技術合成出建構於離散正弦轉換架構求解帕松方程氏之即時區塊性梯度域高動態範圍壓縮硬體電路,其速度可達50MHz,面積占14 mm2 ,而功率消耗為 43.67 mw。


    Due to rapid progress in high dynamic range (HDR) capture technology, HDR images or video display on conventional LCD devices becomes an important topic. Tone mapping algorithms are proposed for rendering HDR images on conventional displays. However, they are impractical for video applications due to intensive computation time. In this paper, we present a real-time block-based gradient domain HDR compression for image or video applications. The gradient domain HDR compression is selected as our tone mapping scheme for its ability of high compression and detail preservation. We equally divide one HDR image/frame into several blocks and process each block by the modified gradient domain HDR compression. The gradients of small magnitude are attenuated less in each block to maintain the local contrast and thus expose the detail. We reconstruct a low dynamic range image by solving the Poisson equation on the attenuated gradient field block by block. A real time DST architecture is proposed to solve the Poisson equation. We implement the hardware of real-time block-based gradient domain HDR compression by Verilog HDL. Our synthesis results show that our hardware architecture for HDR compression with DST Poisson solver can run at 50MHz clock and consume area of 14 mm2 under TSMC 0.13um technology and the power consumption of the design is 43.67mw.

    Contents 中文摘要………………………………………………………………………….…..I ABSTRUCT………………………………...……………………………………..…II 誌謝辭……………………………………………………………………………….Ⅲ Contens................................................................................................................................Ⅳ List of Tables.......................................................................................................................Ⅴ List of Figures.....................................................................................................................Ⅵ 1. Introduction………………………………………………………..……………1 2. Block-Based Gradient Compression……………………………………..……...4 2.1 Human Visual System and Color Space……………………………………….……...4 2.1.1 YUV Color Space……………………………………………………….……………………4 2.1.2 YIQ Color Space……………………………………………………………………….....….5 2.1.3 YCbCr Color Space…………………………………………………………………………...5 2.2 Gradient Domain HDR Compression……………………………………………..…..5 2.3 Gradient Attenuation Function…………………………………………...……….…..9 2.3.1 Gaussian Pyramid…………………………………………………………...………..............9 2.3.2 Gradient Attenuation Factor………………………………………………………………....10 2.4 Implementation of Gradient Domain HDR Compression…………………….…….13 2.4.1 Gradient Compression Algorithm Implementation…………………………..………….…..13 2.4.2 Gradient Domain HDR Compression Simulation……………………………….………......16 2.5 Implementation of Block-Based Gradient Domain HDR Compression……………...21 2.5.1 Block-Based Gradient Compression Algorithm Implementation…………………..……...…..21 2.5.2 Block-Based Gradient Domain HDR Compression Simulation………………………....….23 3. Poisson Solver Approach ………………………………………………………27 3.1 Numerical Solution of Poisson Equation…………………………………………......27 3.2 Discrete Sine Transform and Discrete Fourier Transform…………………………....31 3.2.1 Discrete Sine Transform…………………………………………………………………......31 3.2.2 Fast Fourier Transform……………………………………………………………………....32 3.3 Solving Poisson Equation by DST…………………………………………………...33 3.3.1 The matrix Tm and Eigensystem of Tn-1.................................................................................34 3.3.2 DST- Based Poisson Solver……………………………………………………………....…38 3.3.3 DST-Based Poisson Solver Implementation……………………………………….……....40 4. Hardware Implementation……………………………………………….…....…42 4.1 DST Hardware Architecture........................................................................................42 4.2 Block-Based Gradient Domain HDR Compression Hardware Implementations….....47 5. Conclusions…………………………………………………………………......53 References……………………………………………………………………….…..54 List of Tables Table 1. PSNR of full size gradient domain HDR compression……………………..20 Table 2. PSNR of block-based gradient domain HDR compression……………...…26 Table 3. Detailed hardware architecture implementation……………………………52 List of Figures Figure 1. Concept of tone mapping …………………………………………...………1 Figure 2. Gradient domain HDR compression...............................................................7 Figure 3. Gaussian pyramid……………………………………………….………….10 Figure 4. Relation between α and attenuation (β=0.85)…………………………...…11 Figure 5. Relation between β and attenuation (α=0.12)……………………………...12 Figure 6. The overview architecture implementation of gradient domain HDR compression…………………………………………………………………………..13 Figure 7. The detailed architecture of gradient domain HDR compression implementation……………………………………………………………………….14 Figure 8. The propagation of Gaussian pyramid image attenuation function……..…15 Figure 9. HDR Red channel……………………………………………………….…17 Figure 10. HDR Green channel………………………………………………...…….17 Figure 11. HDR Blue channel………………………………………………………..17 Figure 12. Gradient domain HDR compression with multi-layer attenuation and SOR based Poisson solver……………………………………………………………...…..18 Figure 13. Gradient domain HDR compression with single-layer attenuation and SOR based Poisson solver………………………………………………………………….19 Figure 14. Gradient domain HDR compression with single-layer attenuation and DST based Poisson solver………………………………………………………………….19 Figure 15. Block-based gradient domain HDR compression……………………...…21 Figure 16. Extended block with boundary points………………………………….....22 Figure 17. The simulation result with block size 8*8……………………………..…24 Figure 18. The simulation result with block size 16*16…………………………...24 Figure 19. The simulation result with block size 32*32…………………...…….25 Figure 20. The simulation result with Block size 64*64………………………....25 Figure 21. Numerical approximation grid……………………………………………28 Figure 22. 5*5 matrix boundary condition...................................................................30 Figure 23. The architecture of the DST-based Poisson solver……………………….40 Figure 24. 8-point DST pipeline architecture……………………………………...…44 Figure 25. The mathematics representation of stage 1……………………………….45 Figure 26. The mathematics representation of stage 2, 3…………………………….46 Figure 27. The mathematics representation of stage 4……………………………….47 Figure 28. Hardware architecture of real time block based gradient domain high dynamic range compression………………………………………………………….48 Figure 29. Hardware simulation using 2 blocks(128pixels) input……………...……50 Figure 30. Implementation result of hardware architecture………………………….51

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