本論文提出一種整合高效能PTPD (Phototransistor Photodetector) 的影像感測器新穎架構。
其原理是利用對數放大器(logarithmic amplifier)將PTPD 的大動態範圍(dynamic range)光電流
取自然對數(natural logarithm)，再轉成電壓訊號輸出，並利用一個覆蓋上金屬的假像素(dummy
pixel)來降低暗電流的干擾；此外，此架構可不必像傳統CMOS(complementary metal-oxide
semi-conductor) 影像感測器架構需要透過寄生電容並浪費積分時間等待，可達到即時輸入、
即時輸出的快速讀取。在對數放大器後接上相關性雙取樣電路(CDS，Correlated Double
Sampling)，利用時脈控制，分別將雜訊與雜訊加訊號儲存在電容裡，在輸出時將兩訊號相減，
可有效降低因製程變異所造成的定態雜訊(FPN，Fixed-Pattern Noise)。
晶片的製作是透過國家晶片設計中心，以TSMC 3P3M 0.35μm SiGe BiCMOS 標準製程來
完成，整個系統包括：(1)PTPD 光感測器，為本實驗室所開發的優異光電元件，其光電流可
從pA 到10uA 的數量級；(2)雙端輸入雙端輸出對數放大器，除了受光的PTPD
外，另加上一個PTPD 假像素，以降低暗電流的影響，而雙端輸出則可增加輸出
端的輸出擺幅(output swing)；(3)相關性雙取樣電路，使用取樣電容儲存訊號與
雜訊，將兩端相減取得光感測器轉換成之光電壓訊號；(4)常數轉導偏壓(Constant
Gm Bias)電路提供一個與電源供應電壓無關之偏壓供其他電路使用；最後以一穩
定光源照射感光區域，並以FPGA 產生所需之控制時脈，完成整體電路之操作；
最後以數位示波器量測輸出端得到光電壓訊號。

In this thesis, we present a novel imager that uses high performance Phototransistor
Photodetectors (PTPD). This work is different from other CMOS imagers which have to sense the
voltage drop after the integration time because of low photocurrent. PTPD has linear
wide-dynamic-range photocurrent (~ pA to ~ μA) under wide-dynamic-range illumination (0 lux. to
10000 lux.). So we can sense the photocurrent directly without accumulating charges. The imager is
constructed by: (1)PTPD that converts the light intensity into the photocurrent; (2)logarithmic
amplifier that obtains the wide dynamic range photocurrent from the pixel and outputs the voltage
signal after cancelling the dark current; (3)Correlated Double Sampling(CDS) circuit that cancels
the fixed-pattern noise(FPN) which results from process variations. There are two PTPDs (one is
covered with metal to perform a dark current sensor) in each pixel for automatic cancellation of the
dark current. The design has been fabricated in TSMC 3-poly, 3-metal, 0.35μm SiGe BiCMOS
technology. Experimental results confirm the ability to convert the wide dynamic range
photocurrent to the voltage signals.

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