研究生: |
曾創煒 Tseng, Chuang-Wei |
---|---|
論文名稱: |
雙脈波寬度調變控制應用於高轉換比之直流轉換器 Dual PWM Control for DC-DC Converters with High Conversion Ratio |
指導教授: |
潘晴財
Pan, Ching-Tsai 朱家齊 Chu, Chia-Chi |
口試委員: |
廖聰明
Liaw, Chang-Ming 吳財福 Wu, Tsai-Fu 邱煌仁 Chen, Huang-Jen 陳建富 Chen, Jiann-Fuh |
學位類別: |
博士 Doctor |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2020 |
畢業學年度: | 108 |
語文別: | 中文 |
論文頁數: | 62 |
中文關鍵詞: | 雙頻控制 、雙頻PWM控制 、高降壓比 、高升壓比 、小訊號分析 |
外文關鍵詞: | DC-DC Converters, high step-down conversion ratio, high step-up conversion ratio, dual PWM control, small signal analysis |
相關次數: | 點閱:3 下載:0 |
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各領域在實現高降壓DC-DC轉換器電路設計時,由於半導體元件技術達到極限,有著最小導通時間的限制。因此,在設計DC-DC轉換器時,總是在可接受的轉換比、效率、頻率和體積之間進行取捨。 例如,考慮MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor 本文後續都簡稱為 MOSFET)最小導通時間和最高切換開關頻率下,在單個PWM(Pulse Width Modulation 本文後續簡稱 PWM)控制方式的常規降壓DC-DC轉換器中,無法提供足夠的降壓比轉換能力,尤其當產品體積有所限制需要操作在高頻時,MOSFET 的最小導通時間往往限制了佔空比的極限。 而如果採用單PWM的控制方式,為了符合高降壓比的需求,勢必需要降低開關切換頻率,進而導致儲能元件體積變大。 雖然許多研究文獻提出了新型的架構,但又隨著新架構的磁性元件數量及成本的增加,對高集功率密集度和降低成本的需求背道而馳。 透過本論文的研究,可以透過兩個不同頻率的PWM合成訊號,達到等效兩個 Buck 或 Boost 轉換器串連後的降壓比 D^2 或 1/(1-D)^2 倍,且無需增加任何功率元件,更有效擴大了導通時間的利用,基於我們的研究結果,本文所提出的雙頻PWM控制方式可以歸類為下列五點貢獻:
1.提出了一種雙頻PWM控制方案,可以應用於,具高降壓或升壓的轉換器上,無需對常規電路拓撲進行任何修改,更具成本效益。
2. 提出了雙頻PWM的工作原理與數學分析。
3. 提出了雙頻PWM在連續導通模式(CCM)工作時的小信號開關模型及解析。
4. 提出了新的雙頻PWM控制方法,可以在無須添加任何功率元件下,將降壓比由傳統的 D 提升到D^2 倍。
5. 提出了新的雙頻PWM控制方法,可以在無須添加任何功率元件下,將升壓比由傳統 1/(1-D) 提升到 1/(1-D)^2。
The conventional step down/up DC-DC converters under the single PWM control scheme may not provide enough step down/up voltage conversion capabilities with considering the minimum on-time and the switching frequency of the power switch. In order to overcome this difficulty, a dual PWM control scheme for designing the high step down/up DC-DC converter is proposed in this dissertation. Both high-frequency and low-frequency PWM waveform generators are utilized in synthesizing the dual PWM control of buck/boost converters. The resulting PWM waveform will lead to various switching cycles, and five operating modes of the buck/boost converter which can be defined accordingly. The operation principle of the proposed converter and its small-signal switched model are presented in detail. One salient feature of the proposed design is that if the duty cycle of the high-frequency PWM is exactly equal to that of the low-frequency PWM, by exploring the volt-sec balance condition, the voltage gain can be expressed as the quadratic formula of the duty cycle of the PWM signal when power switches are operated under the continuous conduction mode. Thus, a high step down/up conversion ratio and significant reductions of the inductor current ripple can be ensured simultaneously. Since no modifications of the conventional circuit topology are made, the proposed scheme is very cost-effective. Simulation studies and hardware prototype circuit implementations are conducted to validate the proposed design with satisfactory performance.
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