近來，由於臨界邏輯電路在實作上的快速發展，一併帶動了許多臨界邏輯的相關研究，像是合成、驗證與測試等等。相較於以線性規劃為基底的合成演算法，我們提出了一個藉由重接線來減少臨界值邏輯電路實作成本的演算法。此外，我們也改善既有的臨界邏輯閘簡化演算法。臨界效應輸入向量是一個臨界邏輯閘輸入向量的子集，我們證明了臨界效應輸入向量足以驗證兩個臨界邏輯閘是否相等，不需要比較兩個臨界邏輯閘的真值表。而這也有效的加速了我們驗證臨界邏輯閘功能性所需的時間。

Recently, there have been many works focusing on synthesis, verification, and testing of threshold circuits due to the rapid development in efficient implementation of threshold logic circuits. To minimize the hardware cost of threshold circuit implementation, this paper proposes a heuristic that consists of rewiring operations and a simplification procedure. Additionally, a subset of input vectors of a gate, called critical-effect vectors, are proved to be complete for formally verifying the equivalence of two threshold logic gates, instead of the whole truth table in this paper. This achievement can accelerate the equivalence checking of two threshold logic gates. The experimental results show that the proposed heuristic can efficiently reduce the implementation cost.

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