研究生: |
李威縉 Lee, Wei-Chin |
---|---|
論文名稱: |
分子束磊晶成長高品質氧化物薄膜在超越16nm技術點互補式金氧半電晶體的研究 MBE-grown High quality Oxide Thin Film for CMOS Technology beyond 16nm node |
指導教授: |
洪銘輝
Hong, Minghwei 郭瑞年 Kwo, Raynien |
口試委員: | |
學位類別: |
博士 Doctor |
系所名稱: |
工學院 - 材料科學工程學系 Materials Science and Engineering |
論文出版年: | 2009 |
畢業學年度: | 98 |
語文別: | 英文 |
論文頁數: | 112 |
中文關鍵詞: | 高介電常數閘及氧化物 、砷化鎵 、矽 、氮化鎵 、氧化鉿 |
相關次數: | 點閱:2 下載:0 |
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展望未來半導體產業 ,當元件尺碼持續微縮至16 nm以下,目前產學界的共識皆為,我們不但需要導入高介電常數的閘極氧化物並且需高載子遷移率的通道材料取代使用已久的SiO2/Si系統。此外,高介電常數介電材料及三五化合物半導體必須要能夠被整合在Si上。
本論文的研究主題在於利用獨特之分子束磊晶方法所成長高品質高介電氧化物薄膜來解決此問題。藉由分子束磊晶的成長方式達成了兩項主要的成果:(I)利用(a)介面工程和(b)相變化工程進一步降低等效氧化層厚度,(II)利用分子束磊晶成長高品質氧化物晶體達成將氮化鎵與矽整合的目的。
(I) (a) 藉由分子束磊晶法有效抑制氧化物與Si間介面層之形成。典型的4.9 nm厚的氧化鉿薄膜具有20.7的高介電常數、0.9 nm的等效氧化層厚度以及在1V的時候有約0.4 A/cm2的低漏電流密度。而由1.4 nm厚的原子層沉積成長的氧化鉿和1.5 nm厚的分子束磊晶成長的氧化鉿所組成的薄膜則具有16.2的介電常數、0.7 nm的等效氧化層厚度以及在平帶電壓減1伏特處有5.3×10-1 A/cm2的漏電流密度。由電導法(conductance method)得到的在能隙中間處之缺陷密度為3.6×1011 cm-2eV-1。
(b) 以分子束磊晶成長立方體相的釔摻雜氧化鉿薄膜在(111)的矽以及(100)的砷化鎵基板上。利用X光散射及穿透式電子顯微鏡所進行的詳細的結構及形態分析顯示釔摻雜氧化鉿薄膜是以磊晶形式成長在(111)的矽以及(100)的砷化鎵基板上。而從電性的量測中發現將釔摻雜濃度最佳化可提升氧化鉿薄膜之介電常數至32並在矽及砷化鎵基板上都能達到更低的等效氧化層厚度。
(II) 利用電漿輔助分子束磊晶方式以及一層結晶氧化物薄膜(氧化鈧或□-氧化鋁)做為緩衝層可以成功以磊晶形式成長氮化鎵於矽基板上。反射式高能量電子繞射(RHEED)、高解析穿透式電子顯微鏡以及高解析X光散射技術被用來研究磊晶成長之氮化鎵的結構性質以及其臨場磊晶成長過程。在光學顯微鏡下看不到氮化鎵有任何破裂,證明結晶氧化物薄膜是一個非常有效的緩衝層。
Looking beyond the 16 nm node ICs, researchers have come up a consensus that high-κ dielectrics will become the channel material in the long-standing SiO2/Si system. The combination of high-κ dielectrics with channel made of III-Vs will have to be integrated onto Si.
Themes of this thesis work focus on utilizing unique MBE technique to grow high quality oxides to search potential solutions to solve this issue. Two major achievements has been obtained by employing the MBE method: (I) further reducing the EOT by (a) interfacial engineering and (b) phase transition engineering, (II) the integration of GaN onto Si through the high quality MBE-grown crystalline oxide.
(III) (a) By employing the MBE technique, the formation of the oxide/Si interfacial layer has been effectively suppressed. HfO2 films with 4.9 nm thickness show low leakage current density ~0.4 A/cm2 at 1V, a dielectric constant □ of 20.7, and an EOT of 0.9 nm. The composite film of ALD-HfO2(1.4 nm)/MBE-HfO2(1.5 nm) exhibits an overall□□ value of 16.2, and an EOT of 0.7 nm with a leakage current density of 5.3×10-1 A/cm2 at Vfb -1V. The Dit value at midgap is 3.6×1011 cm-2eV-1 calculated by the conductance method.
(b) Cubic phase yttrium-doped HfO2 (YDH) ultrathin films were grown on both Si (111) and GaAs(100) substrates by molecular beam epitaxy. Thorough structural and morphological investigations by x-ray scattering and transmission electron microscopy reveal that the YDH thin films are epitaxially grown on the Si(111) and GaAs(100) substrates. From the electrical measurements, optimized doping concentration of yttrium into HfO2 increases the dielectric value to 32, achieving lower EOT on both Si and GaAs.
(IV) The epitaxial growth of GaN on Si (111) substrates with a thin crystalline oxide (Sc2O3, or □-Al2O3) as a template/buffer layer is fabricated. The structural properties and in-situ epitaxial growth were studied using reflection high energy electron diffraction (RHEED), high-resolution transmission electron microscopy, and high-resolution x-ray diffraction. The crystalline oxide template serves as an effective barrier layer, and no cracking is observed in GaN.
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