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研究生： 錢文彬
Chien, Wen-Pin
論文名稱： 應用於認知無線電系統之節能合作式頻譜偵測器之設計與實作
Design and Implementation of an Energy-Saving Cooperative Spectrum Sensing Processor for Cognitive Radio
指導教授： 黃元豪
Huang, Yuan-Hao
口試委員:
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2010
畢業學年度： 98
語文別： 英文
論文頁數： 146
中文關鍵詞： 認知無線電 、頻譜偵測 、能量偵測 、節能
外文關鍵詞： cognitive radio, spectrum sensing, energy detector, energy saving
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    • This thesis presents the design and implementation of a spectrum sensing processor for the cognitive radio system. In the cognitive radio system, one cognitive user (secondary user) has a limited capability of detecting the licensed primary user because of the hidden terminal problem; therefore, cooperation of the cognitive users is required to improve the spectrum sensing performance. Nevertheless, the cognitive users do not transmit data or voice all the time, and the idle cognitive users may consume massive spectrum sensing energy instead of communication energy. Therefore, we propose a partial FFT spectrum sensing method to reduce the cooperative spectrum sensing energy. Moreover, we present two techniques, called detection result prediction (DRP) and decision result modification (DRM), to increase the detection accuracy based on the frequency-domain correlation and detection diversity. The simulation results of partial spectrum sensing with AND-rule DRP and MAJ-rule DRM show that the detection performance is improved. In addition, the AND-rule DRP and MAJ-rule DRM have low complexity compared to the arithmetic operations in FFT. We design an energy-saving spectrum sensing processor with AND-rule DRP and MAJ-rule DRM. The partial cached-FFT algorithm is proposed for the control of cached-memory FFT architecture. Based on partial cached-FFT algorithm, the cached-FFT processor is proposed to reduce the computation complexity. The timing schedule for the cached-FFT processor is proposed to reduce the idle time and computation time of partial FFT calculation. The experimental results show that the proposed techniques and architecture can not only reduce spectrum sensing energy consumption to 64% of conventional method but also improve the detection performance.

    本篇論文設計並實作了一個應用於認知無線電系統之合作式節能頻譜偵測電路。在合作式偵測的認知無線電系統中，某些認知使用者(idle user)並不是想要去使用主要使用者的頻帶，但是為了整體的偵測準確度，這些認知使用者也必須參與合作式頻譜偵測，在這種情況下，這些認知使用者雖然在待機狀態也必須消耗能量去做頻譜偵測，因此會對這些認知使用者造成能量消耗的問題，而且對這些認知使用者產生不公平的情形，因為他們所消耗的頻譜偵測能量並不是為了他們自己想要傳輸資料，而是為了其他認知使用者去做頻譜偵測。為了減少idle user的頻譜偵測能量消耗，本論文設計並實作了一個省電的頻譜偵測方法，利用部分頻譜偵測來達到減少快速傅立葉轉換中的運算量。另外我們還設計了具有低複雜度的「偵測結果AND規則預測法」(AND-rule Detection Result Prediction, AND-rule DRP) 和「偵測結果多數決修改法」(MAJ-rule Decision Result Modification, MAJ-rule DRM)，藉由偵測效果在頻譜上的高度相關性來改善偵測效果。本篇論文使用快取式快速傅立葉轉換(Cached FFT)的架構來實作頻譜偵測電路，快取式快速傅立葉轉換演算法可以有規律地減少不需要的運算量，我們改良了部分快速傅立葉轉換演算法的位置存取表，可以移除不必要的運算量，藉此達到減少運算量的效果。除此之外，本篇論文所設計的運算流程可以達到減少運算時間的效果，因此可以達到減少偵測頻譜能量消耗的目的。經由模擬結果與實驗數據可發現，當 idle user使用部分頻譜偵測搭配AND-rule DRP和MAJ-rule DRM的能量消耗為傳統方法的64%，並且可以比原本的方法達到更好的偵測效果。相信此一研究將可以大幅提升認知無線電系統應用到現今傳統的無線通訊系統中的可行性。

    1 Introduction 1.1 Cognitive Radio System 1.2 Research Motivation 1.3 Organization of This Thesis 2 System Model 2.1 Primary User Signal 2.2 Channel Model 2.2.1 Rayleigh Fading Channel 2.2.2 Multipath Effect 2.2.3 Doppler Effect 2.3 Energy Detector 2.4 Decision Threshold Derivation 2.5 Cooperative Spectrum Sensing 2.6 False Alarm Rate and Detection Error Probability 3 Cooperative Partial Spectrum Sensing 3.1 Partial Spectrum Sensing with No Frequency Diversity 3.2 Partial Spectrum Sensing with Frequency Diversity 3.3 Partial FFT Computation Complexity 3.4 Detection Result Prediction 3.5 Time Diversity 3.6 Decision Result Modification 4 Simulation Result 4.1 Partial Spectrum Sensing with No Frequency Diversity 4.2 Partial Spectrum Sensing with Frequency Diversity 4.3 Detection Result Prediction 4.4 Decision Result Modification 4.5 Majority Fusion Function 4.6 Doppler Effect and Multipath Effect 4.7 Increment of The Busy User Number 4.8 Time Diversity 4.9 Received Signal to Noise Power Ratio 4.9.1 Detection Result Prediction 4.9.2 Decision Result Modification 4.9.3 Multipath Effect 4.9.4 Time Diversity 4.10 Occupied Proportion of Primary user (beta) 4.10.1 Detection Result Prediction 4.10.2 Decision Result Modification 5 Partial FFT Energy Detector Implementation 5.1 Introduction 5.1.1 Fast Fourier Transform 5.1.2 Decimation-in-Time Radix-22 Fast Fourier Transform Algorithm 5.1.3 FFT Processor Architecture 5.1.4 Cached-FFT Algorithm 5.2 Proposed Partial Cached-FFT Algorithm 5.3 Spectrum Sensing Processor 5.3.1 Partial Cached-FFT Processor 5.3.2 Spectrum Detection and Preprocessing (DRP) 5.3.3 Fusion Center and Post-processing (DRM) 5.4 Timing Schedule Diagram 5.5 Fixed-point Simulation 6 Chip Implementation 6.1 Design Flow 6.2 Chip Layout and Specification 6.3 Post-layout Simulation 6.4 Performance Measurement 7 Conclusion A Proof of Theorem 1

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