電漿輔助式分子束磊晶原生生長鋁之氮化鎵蕭基二極體

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研究生：	曾心穎 Tseng, Hsin Ying
論文名稱：	電漿輔助式分子束磊晶原生生長鋁之氮化鎵蕭基二極體 Schottky Barrier Diodes with In-Situ Grown Single Crystal Aluminum on GaN by Plasma-Assisted Molecular Beam Epitaxy
指導教授：	鄭克勇 Cheng, Keh Yung
口試委員:	謝光前 Hsieh, Kuang Chien 吳孟奇 Wu, Meng Chyi
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering
論文出版年：	2016
畢業學年度：	104
語文別：	英文
論文頁數：	76
中文關鍵詞：	蕭基二極體、極化、氮化鎵、分子束磊晶
外文關鍵詞：	Schottky diodes, Polarization, GaN, MBE
相關次數：	點閱：3 下載：0
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在本篇論文中，為了減少由於暴露在大氣中所造成的介面污染，進而導致基板表面與蕭基接觸之間的大量介面缺陷密度，我們利用分子束磊晶原生沉積鋁作為氮化鎵蕭基二極體的蕭基接觸。藉由高解析度的X光繞射儀與分子束磊晶過程中的即時監測工具反射式高能量墊子繞射，觀察到此為單晶鋁薄膜，且此磊晶之鋁薄膜其[111]軸與氮化鎵晶體之[0001]軸同向，並且沒有旋轉。
我們也成功地製作出單晶鋁之蕭基二極體，其特性相比與傳統由熱蒸鍍鍍鋁薄膜之蕭基二極體，擁有相似的導通電組、減少近100倍的漏電流(當電壓偏壓在-2伏特)、與增加0.2電子伏特的蕭基位障。這些元件特性的優化我們歸因於由應變引發的壓電場效應，結合費米能級釘扎所造成的影響，由於此推測無法在實驗或是量測上做驗證，我們使用數學模型計算，並且參考高解析度透射電子顯微鏡所拍攝之影像，證實此蕭基位障之增加確實與壓電場效應之影響吻合。
在附錄中我們製作金屬氧化物半導體電容，比較了三種不同的表面處理與氧化層退火介面缺陷密度之影響。此缺陷密度於半導體能階中之分布是利用電容電壓量測，結合電導法所計算出。沸騰之硫酸可以有效降低介面缺陷密度至約1011 eV-1cm-3，而氧化層退火則會造成閥值電壓後退。

In this work, GaN-based Schottky barrier diodes (SBDs) with single-crystal Al barrier grown by plasma-assisted molecular beam epitaxy are successfully fabricated. The lattice registration of single crystal (111) Al on (0001) GaN is investigated using both in-situ reflection high-energy electron diffraction patterns and ex-situ high-resolution x-ray diffractions, and it is determined that epitaxial Al grows with its [111] axis coincident with the [0001] axis of GaN substrate without rotation.
In fabricated SBDs, a 0.2 V barrier height enhancement and 2 orders of magnitude reduction in leakage current, when biased at -2 V, are observed in single crystal Al/GaN SBDs comparing to conventional thermal deposited Al/GaN SBDs. The strain induced piezoelectric field is determined to be the major source of the observed device performance enhancements.
In the appendix, the effects of three different kinds of surface treatment and oxide post-annealing process on the interface state density of n-type MOS capacitors are evaluated by the conductance method. Boiling H2SO4 treatment prior to depositing Al2O3 is the best way to reduce the interface state density (~1011 eV-1cm-3). Post annealing at 850oC for 30 seconds could result in negative shift of threshold voltage.

摘要      1
ABSTRACT    2
CHAPTER 1: Introduction    7
1.1 Background    7
1.2 Introduction to GaN-based Devices    8
1.2.1 Polarization field in GaN-based devices    10
1.3 Organization of work    12
CHAPTER 2: Review of Device Theory and Problems    13
2.1 Theory of ideal Schottky barrier diodes    13
2.2 Practical GaN-based SBDs design considerations    15
2.2.1 Metal/GaN interface contamination    15
2.2.2 Reverse leakage Current    17
CHAPTER 3: The Growth of Single Crystal Aluminum on GaN by PAMBE    18
3.1 In-situ monitored by reflective high energy electron diffraction    21
3.2 X-ray diffraction    23
3.2.1 Wide angle scan    23
3.2.2 Azimuthal cone scans    24
3.3 Lattice registration of single crystal Al on GaN    26
CHAPTER 4: GaN-Based Single Crystal Al-SBDs    32
4.1 Devices fabrication    34
4.1.1 Process steps and mask design    34
4.1.2 Schottky contact fabrication    35
4.1.3 Trench etching    37
4.1.4 Ohmic contact deposition    40
4.2 Current-voltage measurement results    41
4.3 Low frequency noise performance results    44
CHAPTER 5: Investigation on Schottky Barrier Height Enhancement of Single Crystal Al-SBDs    46
5.1 Strain effect between single crystal Al and GaN    48
5.2 Fermi level pinning effect    49
5.3 Schottky barrier height enhancement by strain induced piezoelectric field    51
CHAPTER 6: Conclusion    57
6.1 Summary    57
6.2 Future work    58
6.2.1 High breakdown voltage Schottky barrier diodes    58
6.2.1 Low noise Schottky barrier diodes    58
REFERENCES    60
APPENDIX A : MOSC Interface Trap Density Analysis by Conductance Method    62
A.1 The principle of Capacitance-voltage measurement    62
A.2 Analysis of interface trap density distribution in energy band by conductance method    65
A.2.1 Introduction to conductance method    66
A.2.2 The effect of surface treatment on interface trap density of n type GaN-based MOS capacitors    71
A.2 Summary    77
REFERENCES    78


                                

[1] Caroline Hayes, "Meet the transient power challenge", Electronic Specifier 6th (May 2015).
[2] U. K. Mishra, L. Shen, T. E. Kazior, and Y. F. Wu, Proceedings of the IEEE 90, 1022 (2002).
[3] A. Lidow, J. B.Witcher, K. Smalley, GOMAC Tech Conference (March 2011).
[4] E. T. Yu, X. Z. Dang, P. M. Asbeck, S. S. Lau and G. J. Sullivan, J. Vac. Sci. Technol. B 17, 1742 (1999).
[5] Colin Wood, ‎Debdeep Jena, Polarization Effects in Semiconductors: From Ab Initio Theory to Device Applications (2007).
[6] O. Ambacher, J. Smart, J. R. Shealy, N. G. Weimann, K. Chu, M. Murphy, W. J. Schaff, L. F. Eastman, R. Dimitrov, L. Wittmer, M. Stutzmann, W. Rieger and J. Hilsenbeck, J. Appl. Phys. 85, 3222 (1999).
[7] B. G. Streetman and S. Banerjee, Solid State Electronic Devices 6th (2005).
[8] M Mamor, J. Phys.: Condens. Matter 21, 335802 (2009).
[9] F. Iucolano, F. Roccaforte, F. Giannazzo and V. Raineri, J. Appl. Phys. 104, 093706 (2008).
[10] K. M. Tracy, P. J. Hartlieb, S. Einfeldt, F. R. Davis, E. H. Hurt and R. J. Nemanich J. Appl. Phys. 94, 3939 (2003).
[11] H. Hasegawa and M. Akazawa, Journal of the Korean Physical Society 55, 1167 (2009).
[12] C. I. Wu and A. Kahn, J. Vac. Sci. Technol. B 16, 2218 (1998).
[13] J. Tersoff, Phys. Rev. Lett. 52, 465 (1984).
[14] A. Y. Cho, and P. D. Dernier, J. Appl. Phys. 49, 3328 (1978).
[15] A. Y. Cho, E. Kollberg, W. W. Snell and M. V. Schneider, Electron. Lett.18, 424(1982).
[16] M. Missous, E. H. Rhoderick and K. E. Singer, J. Appl. Phys. 59, 093189 (1986).
[17] P. Kozodoy, J. P. Ibbetson, H. Marchand, P. T. Fini, S. Keller, J. S. Speck, S. P. DenBaars, and U. K. Mishra, Appl. Phys Lett. 73, 975 (1998).
[18] H. Zhang, E. J. Miller and E. T. Yu, J. Appl. Phys. 99, 023703 (2006).
[19] J. W. P. Hsu, M. J. Manfra, R. J. Molnar, B. Heying and J. S. Speck, Appl. Phys Lett. 81, 79 (2002).
[20] P. M. Petroff, L. C. Feldman, A. Y. Cho and R. S. Williams, J. Appl. Phys. 52, 7317 (1981).
[21] I. Poole, M. E. Lee and K. E. Singer, Semicond. Sci. Technal. 6, 090881 (1991).
[22] Mohammed Es-Souni and Salah Habouti, Front Mater. 1, 00019 (2014).
[23] D. Selvanathan, F. M. Mohammed, J.O. Bae and I. Adesida, J. Vac. Sci. Technol. B 23, 2538 (2005).
[24] Dong-Feng Wang, Feng Shiwei, C. Lu, Abhishek Motayed, Muzar Jah, S. Noor Mohammad, Kenneth A. Jones, and L. Salamanca-Riba, J. Appl. Phys. 89, 6214 (2001).
[25] F. Iucolano, F. Roccaforte,a A. Alberti, C. Bongiorno, S. Di Franco, and V. Raineri, J. Appl. Phys. 100, 123706 (2006).
[26] J. W. P. Hsu, M. J. Manfra, R. J. Molnar, B. Heying and J. S. Speck, Appl. Phys Lett. 81, 79 (2002).
[27] M. L. Lee, J. K. Sheu and S. W. Lin, Appl. Phys. Lett. 88, 032103 (2006).
[28] A. Kumar, S. Nagarajan, M. Sopanen, V. Kumar and R. Singh, Semicond. Sci. Technol. 30, 105022 (2015).
[29] S. Contreras, W. Knap, B. Beaumont and P. Gibart, Semiconductors 32, 030257 (1998).
[30] O. Ambacher, J. Majewski, C. Miskys, A. Link, M. Hermann, M. Eickhoff, M. Stutzmann, F. Bernardini, V. Fiorentini, V. Tilak, B. Schaff and L. F. Eastman, J. Phys.: Condens. Matter 14 (2002).
[31] F. Benkhelifa, S. Müller, V. M. Polyakov, and O. Ambacher, IEEE Electron Device Lett. 36, 905 (2015).
[32] J. S. Foresi and T. D. Moustakas, Appl. Phys. Lett. 62, 2859 (1993).
[33] M. L. Lee, J. K. Sheu, and S. W. Lin, Appl. Phys. Lett. 88, 032103 (2006).
[34] A. C. Schmitz, A. T. Ping, M. A. Khan, Q. Chen, J. Yang, Semicond. Sci. Technol. 11, 1464 (1996).
[35] G. Koblmüller, F. Wu, T. Mates, J. S. Speck, S. Fernández-Garrido, and E. Calleja, Appl. Phys. Lett. 91, 221905 (2007).

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