摘要:
本篇論文研究探討金氧半導體電晶體以及金屬半導體電晶體的製程以及特性分析。製程包含用高真空的分子束磊晶系統成長三五族的試片和摻有矽的通道以及Ga2O3(Gd2O3)的氧化層，還有後續電晶體的製作和電性量測與分析。對於n-type 的金屬半導體電晶體，採用了平面二維式製程。尺寸為1 x 50 □m2的元件展現出相當高的電導(transconductance)達180mS/mm以及電流密度160 mA/mm (at Vg=0.5V and Vd=4V)。有效的通道厚度可根據量測到的最高飽和電流密度(Id,sat)以及pinch-off voltage (Vp)來計算得到。有效的通道厚度會比正常成長的通道厚度稍微薄一點，是因為閘極 (gate)所造成的空乏區(depletion region)，一部分是被介面的缺陷(interface trap)影響，或是電性量測的誤差造成。
尺寸為1.6 x 100 □m2空乏型(depletion-mode)的金氧半導體電晶體(MOSFET)，其氧化層厚度為480 Å﹐厚度1000 Å通道的載子濃度為4x1017 cm-3，表現了高達330mA/mm (at Vg=4V and Vd=4V)的電流密度﹐而最大的電導 (transconductance)達130 mS/mm。閘極 (gate) 的電壓可以上升到4V並產生了很大的聚合(accumulation)電流表示出極佳的氧化物與通道的介面性質。氧化物的崩潰電場強度 (breakdown field strength)在正的部份達+6MV/cm而在負的部份達-7MV/cm。漏電流(leakage current)的不對稱性可能是由於製程破壞閘極介電層所造成。

ABSTRACT
In this thesis, recent results on GaAs MESFET and MOSFET were discussed; including MBE growth of GaAs:Si channel layer, deposition of Ga2O3(Gd2O3), device processing and characteristics. For the fabrication of n-channel GaAs MESFET, the planar processing steps were adopted. The device of 1 x 50 □m2 shows a high transconductance gm of 180mS/mm and a maximum current density of 160 mA/mm (at Vg=0.5V and Vd=4V). The effective channel-layer thickness of the device, estimated from the measured saturation current (Id,sat) and pinch-off voltage (Vp), is thinner than the nominal grown channel layer. The difference is mainly caused by the gate depletion, with a small portion of that being influenced by the defects- induced depletion or electrical measurement discrepancy.
A depletion-mode MOSFET, with a size of 1.6 x 100 □m2, Ga2O3(Gd2O3) 480 Å thick as a gate oxide, and a channel 1000 Å thick of a 4E17 cm-3 doping, shows a maximum current density of 330 mA/mm (at Vg=4V and Vd=4V) and a maximum gm of 130 mS/mm. The gate bias-voltage can be up to 4V, raising large accumulation current, which indicate the high quality of the interface of the oxide and the channel. The oxide breakdown field strength is about +6MV/cm for the positive sweep and at least -7MV/cm for the negative sweep. An unsymmetrical behavior in the gate leakage (from gate to source) is probably caused by the damage of gate dielectric during the processing, which has caused high gate leakage currents. The leakage, however, has been reduced with a forming gas annealing.

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