隨著有線及無線網路快速的發展，諸多網路應用，例如：電子商務、信用卡交易系統也越來越普及。在公開網路上利用加解密系統來保護私密或是敏感的資料已經是一個必要的措施，網路加解密系統主要有三大類，分別為私密金鑰（private-key）加解密系統、公開金鑰（public-key）加解密系統、以及雜湊函數（hash function）。一般來說，用軟體實作公開金鑰加解密系統無法滿足高吞吐量（throughput）或即時應用（real-time application）的要求，因此需要擁有高吞吐量且支援可變金鑰長度的硬體實作來加速運算。

在這篇論文中，我們提出了一個可支援可變金鑰長度之網狀結構（mesh-structured）多細胞（multi-cell）乘法器，並且適用於多數公開金鑰加解密系統。乘法器的設計是基於以字組為運算基礎的蒙哥馬利（Montgomery）演算法，可調式的細胞陣列結構可以有效率地同時處理不同金鑰長度的運算。當要處理例如2048-bit的長金鑰運算時，我們將會動態調整多個細胞一起加速運算，這些細胞會分享彼此的儲存單元讓運算元（operand）平均儲存在這些細胞裡。有規律的網狀結構便利硬體上的實作，可調式的方法提供了可權衡系統效能及面積上的高彈性。基於這個架構，我們實作了包含16個細胞的細胞陣列，可支援到4096-bit的金鑰長度。我們用台積電0.13μm的製程來合成電路，在181MHz的時脈下，對於1024-bit、2048-bit及4096-bit的RSA運算，吞吐量分別為84.1Kbps、21Kbps及5.2Kbps。

With the rapid advance in wired and wireless communication, many applications, e.g., ECommerce
and credit card transaction system, have become more and more popular. Using cryptographic
algorithms to protect private and sensitive information on the public network therefore
becomes an essential measure. Generally speaking, the software implementation of public-key
cryptographic algorithms can not satisfy the high throughput requirements. The hardware approach
which has better throughput and supports scalable key size is thus desirable.
In this thesis, we propose a mesh-structured multi-cell multiplier which can support scalable
key length for most public-key cryptographic algorithms. The design of multi-cell multiplier is
based on a word-based Montgomery multiplication algorithm. The congurable cell array architecture
can efciently address multiple tasks of different key sizes in parallel. When performing a
long modular multiplication, e.g., 2048-bit, multiple cells are congured together to accelerate the
computation, where the input operands are averagely stored in these cells, sharing the memory resources
as well. The regular mesh-structured architecture facilitates the physical implementation.
Moreover the recongurable scheme provides a high exibility in the tradeoff between performance
and silicon area. Based on the proposed architecture, we implement an array of sixteen
cells, which can support the key size up to 4096-bit. The mesh-structured cell array is synthesized
using 0.13μm cell library, which can achieve the throughput of 84.1Kbps for 1024-bit RSA,
21Kbps for 2048-bit RSA, and 5.2Kbps for 4096-bit RSA at a 181MHz clock frequency.

[1] NIST, Recommendation for Key Management, National Technical Information Service,
Springeld, VA 22161, Oct. 2008.
[2] W. Dife and M. E. Hellman, “New directions in cryptography”, IEEE Trans. on Information
Theory, vol. 22, no. 6, pp. 644–654, Nov. 1976.
[3] R. L. Rivest, A. Shamir, and L. Adleman, “A method for obtaining digital signatures and
public-key cryptosystems”, Communications of the ACM, vol. 21, no. 2, pp. 120–126, Feb.
1978.
[4] N. Koblitz, “Elliptic curve cryptosystems”, in Mathmatics of Computation, 1987, pp. 203–
209.
[5] P. L. Montgomery, “Modular multiplication without trial division”, Math. Computation, vol.
44, no. 7, pp. 519–521, 1985.
[6] K. Itoh, M. Takenaka, N. Torii, S. Temma, and Y. Kurihara, “Fast implementation of publickey
cryptography on a dsp tms320c6201”, in Proc. Cryptographic Hardware and Embedded
Systems, 1999, pp. 61–72.
[7] J. GroBschadl, K. C. Posch, and S. Tillich, “Architectural enhancements to support digital
signal processing and public-key cryptography”, in Proc. the 2nd Workshop on Intelligent
Solutions in Embedded Systems, June 2004, pp. 129–143.
[8] S. E. Eldridge and C. D. Walter, “Hardware implementation of Montgomery's modular multiplication
algorithm”, IEEE Trans. on Computers, vol. 42, no. 6, pp. 693–699, June 1993.
55
[9] C. D. Walter, “Systolic modular multiplication”, IEEE Trans. on Computers, vol. 42, no. 3,
pp. 376–378, Mar. 1993.
[10] A. Tenca and C□ . K. Koc□, “A scalable architecture for modular multiplication based on montgomery's
algorithm”, IEEE Trans. on Computers, vol. 52, no. 9, pp. 1215–1221, Sept. 2003.
[11] Y.-C. Lin, C.-P. Su, C.-W. Wang, and C.-W. Wu, “A word-based RSA public-key cryptoprocessor
core”, in Proc. 12th VLSI Design/CAD Symp., Hsinchu, Aug. 2001.
[12] M.-C. Sun, C.-P. Su, C.-T. Huang, and C.-W. Wu, “Design of a scalable RSA and ECC
crypto-processor”, in Proc. Asia and South Pacific Design Automation Conf. (ASP-DAC),
Kitakyushu, Jan. 2003, pp. 495–498, (Best Paper Award).
[13] J. Fan, K. Sakiyama, and I. Verbauwhede, “Montgomery modular multiplication algorithm
on multi-core systems”, in Proc. IEEE Workshop on Signal Processing Systems: Design and
Implementation, 2007, pp. 261–266.
[14] J. Fan, K. Sakiyama, and I. Verbauwhede, “Montgomery modular multiplication algorithm
for multi-core systems”, in Proc. ECRYPT Workshop, Software Performance Enhancement
for Encryption and Decryption, 2007, pp. 77–92.
[15] NIST, Data Encryption Standard (DES), National Technical Information Service, Springeld,
VA 22161, Oct. 1999.
[16] NIST, Advanced Encryption Standard (AES), National Technical Information Service,
Springeld, VA 22161, Nov. 2001.
[17] I. Niven, H. S. Zuckerman, and H. L. Montgomery, An Introduction to the Theory of Numbers,
John Wiley & Sons, 1991.
[18] P.-S. Chen, S.-A. Hwang, and C.-W.Wu, “A systolic RSA public key cryptosystem”, in Proc.
IEEE Int’l Symp. on Circuits and Systems (ISCAS), Atlanta, May 1996, vol. 4, pp. 408–411.
56
[19] C.-C. Yang, T.-S. Chang, and C.-W. Jen, “A new RSA cryptosystem hardware design based
on Montgomery's algorithm”, IEEE Trans. on Circuits and Systems II: Analog and Digital
Signal Processing, vol. 45, no. 7, pp. 908–913, July 1998.
[20] Open SystemC Initiative (OSCI), “SystemC standards”, http://www.systemc.org.
[21] “IEEE Std 1666-2005 IEEE standard SystemC language reference manual”, in IEEE Std
1666-2005, 2006, pp. 1–423.