隨著Henrich Hertz和Nikola Tesla證明環境中電磁波的存在，隨後Nikola Tesla提出了無線充電的概念，射頻能量收集逐漸進入大家的視野。
單位面積內太陽能、熱能、震動能量都大於射頻能量，這表明射頻能量的收集的難度相對較大。並且環境中的射頻能量有時會被隔絕，不能時刻提供穩定的射頻能量輸入，因此需要對收集來的能量進行儲存和管理，以供後續使用。儘管如此，由於其優勢，當今市面上已有許多低功耗電路使用射頻能量充當起能量來源，但是其射頻能量收集電路的靈敏度較低、效率不高，從而使用的條件相對苛刻。
因此，本文提出的高靈敏度、低功耗、高轉換效率的射頻能量收集電路。希望在保證轉換效率的前提下，降低RF Energy Harvesting電路所需成本，提高經濟效益，讓RF Energy Harvesting在之後能得到真正的普及。
晶片使用TSMC 0.18μm 1P6M CMOS的製程來製作，尺寸大小為338.964 μm x 255.36 μm。電路供應的射頻能量為 -20 dBm。負載為13kΩ的電阻、1nH的電感及1pF的電容，模擬後端Power IC的輸入。在輸入的的射頻能量為 -20 dBm條件下，輸出足夠能量供後端Power IC收集並使用。

With the demonstrations of electromagnetic waves in the environment by Heinrich Hertz and Nikola Tesla, followed by Nikola Tesla's concept of wireless charging, the idea of RF energy harvesting gradually entered the public consciousness.
Energy harvesting from radio frequency sources faces more significant challenges than solar, thermal, and vibrational power within a unit area. It indicates that collecting radio frequency power is relatively more complex. Additionally, radio frequency power in the environment is sometimes isolated and cannot consistently provide a stable radio frequency power input. Therefore, storing and managing the collected energy for subsequent use is necessary. Despite these challenges, low-power circuits utilizing radio frequency energy as their power source are readily available in today's market. However, their RF energy harvesting circuits often exhibit lower sensitivity and efficiency, making their conditions of use relatively demanding.
Therefore, this paper introduces an RF energy harvesting circuit with high sensitivity, low power consumption, and high conversion efficiency. The goal is to reduce the cost of RF Energy Harvesting circuits while maintaining conversion efficiency, ultimately enhancing economic viability, and promoting the widespread adoption of RF Energy Harvesting in the future.
The chip is manufactured using TSMC's 0.18μm 1P6M CMOS process and has dimensions of 338.964 μm x 255.36 μm. The circuit is designed to operate with an input radio frequency power of -20 dBm. It interfaces with a load consisting of a 13 kΩ resistor, 1 nH inductor, and 1 pF capacitor, simulating the input to the backend Power IC. Under the given conditions with an input radio frequency power of -20 dBm, the circuit can produce sufficient power for collection and use by the backend Power IC.

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