研究生: |
蔡宗穎 Tsai, Tzung Ying |
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論文名稱: |
使用改良式離子佈植製程來製作雙自我對準4H碳化矽垂直型金氧半場效電晶體 Double Self-Aligned 4H-SiC DMOSFET Realized by Improved Implantation Process |
指導教授: |
黃智方
Huang, Chih Fang |
口試委員: |
龔正
Gong, Jeng 李坤彥 Lee, Kung Yen |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2015 |
畢業學年度: | 104 |
語文別: | 中文 |
論文頁數: | 51 |
中文關鍵詞: | 碳化矽 、垂直型金氧半場效電晶體 、雙自我對準 |
外文關鍵詞: | 4H-SiC, double-implanted metal-oxide-semiconductor field effect transistor, double self-aligned |
相關次數: | 點閱:2 下載:0 |
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本論文的目標是利用自我對準P井及源極傾斜角度離子佈植來製作出短通道的4H碳化矽垂直型雙佈植金氧半場效電晶體。並配合歐姆金屬自我對準製程,來縮小元件的單位線寬,因而達到降低特徵導通電阻的期望。
本次實驗根據上述製程製作出D-mode DMOSFET元件,量測到最佳特徵導通電阻為57.95 mΩ*cm2,此時量測條件為閘極電壓20伏特、汲極電壓1伏特,發生在較小動作區面積31482 um2及較長有效通道寬度5004 um、JFET長度4 μm的元件。另外本次實驗量測到的最佳崩潰電壓是在磊晶層厚度為30 μm的sample僅700伏特,應該是由於P井離子佈植在1650oC退火的活化不完全,導致在反向高壓時的橫向擊穿。
The goal of this thesis is to use self-aligned p-well and n-source ion implantation with tilting an angle to fabricate a short channel 4H-SiC double implant MOSFET. Also with a self-aligned ohmic contact process, the device cell pitch can be shrunk and hence the specific on resistance is expected to reduce significantly.
In this experiment, we have demonstrated D-mode DMOSFETs with the proposed process and the best RON,SP is 57.95 mΩ*cm2, extracted when Vg = 20 V and Vd = 1 V on a device with a smaller active area of 31482 um2, a longer effective channel width of 5004 um and a JFET length of 4 μm. The best breakdown voltage measured in this work is only 700 V on a sample with a epi-layer thickness of 30 μm. And the possible explanation is the incomplete p-well ion implantation activation at 1650oC anneal, which causes lateral punch-through at high reverse biases.
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