Pt-SBT-HfO2-Si MFIS 鐵電薄膜電容結構之研究｜國立清華大學博碩士論文庫

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研究生：	林政漢
論文名稱：	Pt-SBT-HfO2-Si MFIS 鐵電薄膜電容結構之研究
指導教授：	胡塵滌
口試委員:
學位類別：	碩士 Master
系所名稱：	工學院 - 材料科學工程學系 Materials Science and Engineering
論文出版年：	2005
畢業學年度：	93
語文別：	中文
論文頁數：	114
中文關鍵詞：	鐵電記憶體、SBT 、MFIS 、介面層、HfO2
相關次數：	點閱：2 下載：0
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本論文共分為兩部分，第一部分探討以不同厚度HfO2作為鐵電材料SBT與Si間的擴散阻絕層，對MFIS鐵電薄膜電容結構的影響。實驗發現薄膜厚度與後續熱處理會對HfO2結晶特性與擴散阻絕能力有明顯影響。鍍覆HfO2時，所有試片均會在HfO2/Si間產生介面層(IL)，且經後續熱處理IL明顯增厚。經計算後IL介電常數約為5.67，在MFIS結構佔去不可忽視的跨壓。SIMS分析顯示三組厚度的HfO2試片均無法阻擋Si擴散進入SBT，且HfO2的Hf亦均會擴散進入SBT。儘管如此，HfO2仍具有相當高的介電常數，好的介面特性與低漏電流。鍍覆在不同厚度HfO2上的SBT皆具有良好結晶性與均勻晶粒結構，使MFIS鐵電薄膜電容具有相當大的記憶視窗/外加電壓比，非常適合低壓下操作。本研究證實了HfO2是1T-FeRAM中最好的擴散阻絕層之一。

第二部分利用鈦酸鋇塊材與硝酸銀水溶液，探討在鐵電材料表面上光化學反應的發生。實驗結果顯示高能光源可激發鐵電材料內電子電洞對，激發出的載子將被特定的鐵電域(+c Domain)吸引，使奈米銀粒子選擇性地在鈦酸鋇表面析出。本實驗證實銀粒子分佈與鐵電域結構間的相互關係，並成功整合奈米電極與鐵電元件。印證了鐵電微影技術的可行性。

目錄
第一章 緒論……………………………………………………………...1
1-1 前言……………………………………………………………….....1
1-2 高介電材料的興起……………………………………………….....1
1-3 鐵電記憶體的優點……………………………………………….....2
1-4 鐵電記憶體材料的選擇………………………………………….....2
1-5 鐵電材料的表面微影(Lithography) ……………………………......3
1-6 研究方向……………………………………………………….........4
第二章 文獻回顧………………………………………………………...5
2-1 高介電材料…………..………………………………………….…..5
2-1-1高介電材料的發展契機…….…………………………………5
2-1-2高介電材料的選擇……………………………….……………5
2-1-3 HfO2作為高介電材料的優勢………………………………….7
2-1-4鍍覆HfO2所遭遇的問題－低介電常數介面層的生成……….7
    2-1-4-1 IL組成研究……………………………………….……….8
    2-1-4-2 IL的生成與成長原因……………………………………..9
    2-1-4-3 IL對電容結構的影響與改善方法………………………..9
2-2鐵電材料…………..………………………………………….…....10
2-2-1 鐵電性……..………………………………………….……...10
2-2-2 鐵電材料的結構與特性…………………………….……….11
2-2-3 鐵電薄膜的可靠度…………………………….…………….13
2-2-4 鐵電薄膜的鍍覆…………………………….……………….14
    2-2-4-1配方溶液的研製與調配……………….…………………15
    2-2-4-2薄膜在基板的被覆…………….…………………………15
    2-2-4-3低溫焦化處理…………….………………………………16
    2-2-4-4高溫結晶與緻密化處理.…………………………………16
2-2-5 SBT鐵電薄膜之相變化……….……………………………..17
2-3鐵電記憶體………..………………………………………….……18
  2-3-1 歷史……..………………………………………….………...18
  2-3-2 鐵電薄膜於記憶體元件上的應用…………………………..18
  2-3-3 鐵電材料應用在記憶體上的問題…………………………..20
  2-3-4 MFIS結構的興起與特性…………………………………….21
2-4鐵電微影技術…..………………………………………….………23
  2-4-1 原理…..………………………………………….…………...23
  2-4-2 應用…..………………………………………….…………...24
2-5實驗目的..………………………………………….………………25
第三章 實驗程序……………………………………………………….37
3-1-0 第一部分實驗簡介……………………………………………..37
3-1-1 基板準備………………………………………………………..37
3-1-2 擴散阻絕層製備………………………………………………..37
3-1-3 SBT鐵電薄膜製備……………………………………………...38
3-1-3-1 SBT溶液之TG/DTA分析…………………………….…..38
3-1-3-2有機金屬裂解法製備SBT薄膜的流程……………………39
3-1-4 白金電極製備…………………………………………………..39
  3-1-4-1底電極的製備………………………………………………39
  3-1-4-2頂電極的製備………………………………………………40
3-1-5 試片代號表示…………………………………………………..41
3-1-6 MFIS結構性質之量測分析…………………………………….41
  3-1-6-1電性量測……………………………………………………41
  3-1-6-2物性分析……………………………………………………43
3-2-0 第二部分實驗簡介……………………………………………..47
3-2-1 BaTiO3塊材準備………………………………………………..47
3-2-2 AgNO3水溶液製備……………………………………………...47
3-2-3 實驗配置………………………………………………………..47
3-2-4 表面影像分析…………………………………………………..47
第四章 結果與討論-第一部分………………………………………...55
4-0簡介………………………………………………………….……..55
4-1 HfO2結晶特性隨薄膜厚度，以及後續熱處理的變化……………55
4-2 HfO2厚度及熱處理條件對SBT薄膜結晶特性的影響………….58
4-3 HfO2厚度對SBT薄膜表面形貌的影響………………………….59
4-4厚度與熱處理條件對HfO2及SBT薄膜表面粗糙度的影響……..60
4-5 TEM介面探測與介面層(IL)分析……………………………...…61
  4-5-1 HfO2/IL/Si橫截面(Cross Section)TEM觀察………………...61
4-5-2 SBT/HfO2/IL/Si橫截面(Cross Section)TEM觀察………..…63
4-6不同HfO2厚度及熱處理時間對SBT薄膜之縱深成分分析……65
4-7 HfO2薄膜與介面層(IL)分析……………………………………...66
4-8 Pt/HfO2/Si(MIS)結構電性量測…………………………………....67
  4-8-1電容-電壓曲線圖……………………………………………..67
  4-8-2負值記憶視窗與電壓關係……………………………………68
4-9 Pt/SBT/HfO2/Si(MFIS)結構電性量測……………………………68
  4-9-1外加電壓在各層間的分佈……………………………………68
  4-9-2電容電壓曲線圖量測…………………………………………69
  4-9-3記憶視窗與外加電壓關係……………………………………70
  4-9-4 MFIS結構理想可達的記憶視窗值與實際量測值之比較….73
  4-9-5漏電流密度量測………………………………………………74
  4-9-6時效(Retention)量測…………………………………………..74
4-10介面層對MFIS結構的影響…………………………………..…76
第五章 結果與討論-第二部分………………………………...………98
5-0 簡介………………………………………………………………..98
5-1  AFM表面起伏分析…………………………………………...…98
5-2 試片表面鐵電域結構(Domain Structure)與光化學反應探討…..99
5-3 實驗結果後續應用………………………………………………100結論………………………………………………………………...…105
參考文獻……………………………………………………………….107

表目錄
表2-1 高積集度積體電路元件中的高介電材料所應滿足的條件…..26
表4-1 各試片SBT薄膜的介電常數與各層所佔跨壓………………..77
表4-2 各試片在施加6V閘極電壓時實際測得之記憶視窗與理想記憶視窗值…………………………………………………………..78

圖目錄
圖2-1 鈣鈦礦結構內的鐵電域圖，AA’為90度域壁，BB’為180度域壁…………………………………………………………….27
圖2-2 鐵電材料極化(P)與外加電場(E)的關係……………..……….28
圖2-3 鈣鈦礦結構…………………….................................................29
圖2-4  SrBi2Ta2O9的層狀鈣鈦礦結構……………………………….30
圖2-5 浸鍍的過程……………………………………….……………31
圖2-6 旋鍍的過程………………………………………………….…31
圖 2-7  SBT內三種相之XRD繞射峰圖形…………………..……...32
圖2-8 鐵電薄膜用於DRAM之操作示意圖……………...................33
圖2-9一般線性介電值(a)與非線性介電值(b)……………………….33
圖2-10 1T-1C type 鐵電記憶體操作原理……………………............34
圖2-11 FET-type鐵電記憶體操作原理示意圖………………....……35
圖2-12鈦酸鋇能帶圖，(a)居禮溫度以上，(b)居禮溫度以下，C+ Domain (c)居禮溫度以下，C- Domain………….…………...36
圖3-1  DTA原理示意圖…….…………………………………..……49
圖3-2  SBT溶液之TG分析………………………………………….50
圖3-3  SBT溶液之DTA分析………………………………………..50
圖3-4  SBT薄膜電容結構……………………………..……………..51
圖3-5 實驗步驟流程圖………………………………….……………52
圖3-6 記憶視窗(a)順時針，鐵電效應(b)逆時針，電荷陷阱效應….53
圖3-7 第二部分實驗示意圖，其中BaTiO3、O-Ring與石英片的厚度
      分別為1.2mm、2mm與2mm………………..……….………54
圖4-1 不同厚度HfO2剛鍍覆在Si基板上之XRD繞射圖……..…..79
圖4-2  不同厚度HfO2經過後續熱處理後之XRD繞射圖………..79
圖4-3  不同厚度HfO2分別在後續熱處理前後之Plan View 與選區電子繞射圖…………………………………………………...80
圖4-4  不同厚度HfO2試片在後續熱處理後之選區電子繞射圖，
       m=monoclinic，t=tetragonal…………………………............81
圖4-5  (a)(A+SBT)1m、(b)(B+SBT)1m、(c)(C+SBT)1m之XRD繞射圖，SBT薄膜熱處理條件為RTA 750℃ 1min…….……82
圖4-6  (a)(A+SBT)3m、(b)(B+SBT)3m、(c)(C+SBT)3m之XRD繞射圖，SBT薄膜熱處理條件為RTA 750℃ 3min………….82
圖4-7  SBT在不同厚度HfO2上經過結晶熱處理後之FESEM表面形貌…………………………………………………………...83
圖4-8  SBT在不同熱處理條件下的剖面形貌……………………..84
圖4-9  HfO2薄膜在不同厚度及後續熱處理前後之表面AFM影像
………………………………………………………………..85
圖4-10  SBT薄膜在不同HfO2厚度及熱處理條件下之表面AFM影像……………………………………………………………..86
圖4-11 不同厚度HfO2在不同熱處理條件下之表面方均根粗糙度 (a)HfO2剛鍍製、(b)HfO2 1000℃ 30sec後續熱處理、(c)SBT 750℃ 1min結晶熱處理、(d)SBT 750℃ 3min結晶熱處理
……………………………………………………..……….87
圖4-12 不同厚度HfO2分別在後續熱處理前後之TEM截面圖
        (a)熱處理前、(b)熱處理後………………….…………….88
圖4-13  SBT於不同厚度HfO2與不同結晶熱處理時間下之TEM截面圖………………………………………………………...89
圖4-14  HfO2與IL的厚度在不同熱處理條件下比較圖，(a)HfO2剛鍍製、(b)HfO2後續熱處理後、(c)SBT結晶熱處理一分鐘 (d)SBT結晶熱處理三分鐘………………………………..90
圖4-15  IL在不同熱處理條件下之厚度，(a)HfO2剛鍍製、(b)HfO2後續熱處理後、(c)SBT結晶熱處理一分鐘、(d)SBT結晶熱處理三分鐘………………...................................................90
圖4-16  (a)(A+SBT)1m 與 (b)(A+SBT)3m之TEM截面影像......91
圖4-17  (a)(A+SBT)1m 、(b)(A+SBT)3m 與(c)(B+SBT)1m 之縱深成分分析圖………………………………………………...92
圖4-18  EOT與HfO2厚度之線性分析圖…………………………93
圖 4-19  不同厚度HfO2下之MIS結構C-V loop………………....94
圖4-20  不同厚度HfO2之記憶視窗-電壓關係圖………………...95
圖4-21  SBT於不同厚度HfO2下，其MFIS結構之電容-電壓關係曲線圖………………………...................................................96
圖4-22  SBT於不同厚度HfO2下，其MFIS結構之記憶視窗-電壓關係曲線圖，(a)(A+SBT)1m 、(b)(B+SBT)1m 、(c)(C+SBT)1m
        (d)(A+SBT)3m 、(e)(B+SBT)3m 、(f)(C+SBT)3m …….96
圖4-23  SBT於不同厚度HfO2下，其MFIS結構之漏電流密度-電壓關係曲線圖….......................................................................97
圖4-24  SBT於不同厚度HfO2下，其MFIS結構之時效量測圖
……………………………………………………………...97
圖5-1   光還原反應後的BaTiO3表面影像圖。(b)與(c)分別為(a)與(b)圖內方框所示之高解析度影像…………………………..101
圖5-2   分別在水與丙酮中做超音波震盪20min後的BaTiO3表面影像。其中(b)為(a)圖中方框的高解析度影像…………….102
圖5-3   鐵電材料Domain結構，(a)180o a-a Domain、(b) 180o c-c Domain、(c) 90o a-c Domain、(d)90o a-a Domain……….103
圖5-4   BaTiO3單一晶粒內的90o Domain 與180o Domain…….103
圖5-5   BaTiO3表面AFM影像與方框內鐵電域結構示意圖…..104

                                

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