因為對設計的 IC 圖的非線性形狀失真進行建模過於復雜這個事實，促使
開發基於學習的預仿真模型。此類模型通常由成對訓練樣本驅動，每個訓
練樣本由版圖圖案和版圖光刻結果的掃描電子顯微鏡 (SEM) 圖像組成，我
們通常稱為布局圖-SEM 影像對（layout-SEM pair)。對於一個新的製程，
收集訓練數據（layout-SEM pair)來獲得預仿真模型既費時又費錢。因此，
我們提出了一種基於深度學習的主動學習使用圖結構來減少足以製造用於
獲取其 IC 產品的真實電路輪廓的佈局數量。

在本文中，我們分析了不同的採樣標準，包括一種基於密度的標準，並
設計了一種新的主動方法，該方法可以通過利用兩個子網絡、一個自動編
碼器(Autoencoder) 和一個預訓練的佈局到 SEM 預測模型(LithoNet) 來評
估佈局的潛在新穎性。一個自動編碼器(Autoencoder) 特徵表示訓練樣本
的布局圖之間的全局結構相似性，而佈局到 SEM 預測模型(LithoNet) 的
特徵來描述布局圖到SEM的非線性局部變形。 通過這種設計，所提出的方
法可以在沒有任何佈局集群或標籤信息的情況下，從一組新佈局模式中找
到具有代表性的抽樣。最後，我們設計了 IC 製造過程中遇到的實際實驗
來證明我們方法的有效性，實驗結果表明識別的佈局新穎性可用於微調基
於學習的預仿真模型和提高其性能。

It is too complicated to model the non-linear shape distortion of the metal layer between the IC layout design and its fabrication result. This difficulty urges the development of learning-based IC pre-simulation models. Such models are usually driven by pairwise training samples, the so-called layoutSEM pair, each consisting of a layout pattern and the scanning electron microscope (SEM) image of the lithography result of the layout.
However, it is time-consuming and expensive to collect an enough amount of training data (layout-SEM pair) for developing a pre-simulation model for a new fabrication process. Therefore, in this paper we propose a deep learning-based active learning algorithm to select layouts, which are worthy and informative enough to be fabricated for acquiring their ground-truth
SEM images from their IC products, based on the graph structure characterizing the data manifold of the whole layout sample space.
Our graph structure is defined according to latent features extracted by two different subnetworks. One subnetwork characterizes the global structure similarity between the given layout and training samples, and the other embeds local structures into an attention-guided latent code depicting the
local deformation. Therefore, a graph defined by these two latent codes can effectively describe both normal regular layout samples, which are usually clustered in the feature space, and novel layout samples, which tend to locate sparsely in the feature space and tend to be far away from regular samples. Hence, through this design, the proposed method can be find the most representative samples, novel or not, from a pool of new unseen layout patterns without any layout clustering or labeling information. At the end, we design several experiment sets to prove our method’s effectiveness and
practicability in the IC manufacturing. Experiment results demonstrate that the identified layout novelties can be used to fine-tune a learning-based presimulation model and boost its performance. We also compared our method with other active learning sampling strategies. Our method outperforms previous state-of-the-art sampling methods and active learning strategies in
almost all aspects.

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