本論文提出一個應用於IEEE802.11a無線區域網路的單一互補式金氧半射頻前端晶片。為了實現單一積體化，我們採用Zero-IF的接收機架構以減少晶片外中頻濾波器及中頻電路的使用，同時可以避免影像訊號所造成的干擾。射頻前端電路包含三個部分：差動輸入低雜訊放大器、主動式轉換頻率混波器及多相位濾波器，此外，內建偏壓電路和數位控制電路。數位電路控制低雜訊放大器工作頻帶的切換，以達到寬頻的應用，且補償製程偏移，提高晶片的良率，在I / Q 路徑上使用可提供增益及所需較小本地震盪信號振幅的雙端平衡主動Gilbert混波器，最後使用多相位濾波器來產生I / Q 路徑上所需要的九十度相位差訊號。
整個射頻前端電路為寬頻設計並有數位控制機制，量測結果顯示整體雜訊指數為 9dB，輸入端反射係數小於-10dB涵蓋5.25 ~ 5.85 GHz頻帶，且整體系統的增益為22.9dB，P1dB為-27.5dBm，IIP3為-12.5dBm。本射頻前端電路是使用聯電0.18微米單多晶層六金屬層之互補式金氧半場效電晶體製程來設計，並操作在工作電壓為1.8伏特下，功率消耗為19.67毫瓦(緩衝器消耗為33.3毫瓦)，面積為0.980 * 1.396 mm2。

The thesis proposes the design and implementation of a single-chip CMOS RF front-end circuit for IEEE802.11a WLAN application. For SOC implementation, the use of Zero-IF receiver architecture reduces the necessity of off-chip component such as IF filter and IF circuit. At the same time, the interference of the image signal is avoided. The RF front-end circuit is composed of three blocks, differential low noise amplifier (LNA), active down-conversion mixer and poly phase filter. In addition, a constant-gm bias circuit and a digital control circuit are built in. The digital control circuit not only controls the operation band selection of low noise amplifier for wide-band application but compensates the process variation for higher chip yield. The use of double-balance active Gilbert mixer at I/Q path provides higher conversion gain and needs lower local oscillation signal amplitude. Finally, a poly phase filter is used to generate quadrature signal for I/Q path. The whole RF front-end circuit is a wide-band design with digital control mechanism. The overall noise figure is 9dB and S11 is below -10dB within the 5.25 ~ 5.85 GHz band. The conversion gain of the system is 22.9dB, P1dB is
-27.5dBm and IIP3 is -12.5dBm. The RF front-end circuit is implemented in 0.18um 1P6M CMOS process and operated with 1.8V power supply. In addition, it consumes 19.67mW (buffers consume 33.3mW) and occupies 0.980 * 1.396 mm2 die area including bond pads.

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