由於射頻積體電路其工作頻率範圍不斷地上升，若欲得到準確的電路模擬結果，基板寄生效應就必須納入金氧半場效電晶體的元件模型之中。然而，以傳統的元件模型而言，這方面的工作仍有再改善的必要。

因此，本篇論文提出一個新的參數萃取方法，能夠萃取出包含基板寄生電阻及電容之金氧半場效電晶體元件模型的所有小訊號參數。根據由我們首次提出的Iteration Method，元件小訊號等效電路模型的參數能夠直接利用電路分析方程式來求出，而不需任何假設。

總的來說，我們提出的新方法在沒有經過任何多餘的參數最佳化處理的情況下，以500 MHz到高達40 GHz的頻段而言，都能夠得到令人滿意的準確元件模型。

As the operating frequency rises to the gigahertz range for RF applications, the extrinsic parasitics related to the lossy Si substrate should be included into the MOSFET model physically for achieving accurate and predictive simulation results. However, it is still not described appropriately in the traditional MOSFET models.

Therefore, this work proposes a new approach to extract RF CMOS small-signal model parameters including the substrate parasitic RC network. Based on the newly developed “iteration method”, the model parameters can be extracted directly through the analytical equations without any assumptions.

In sum, without any additional optimization procedure, the proposed methodology shows overall satisfactory agreement to the measurement results from 500 MHz to 40 GHz.

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