在現今科技生活中，可攜帶式電子產品已經是不可或缺的物品，而記憶體在這
些電子產品中更是扮演很重要的角色。隨著現今科技的進步，現今電子產品發展
更傾向輕薄短小且節能，因此許多研究單位大量投入次世代非揮發式記憶體的研
究。其中又以電阻式記憶體具有結構簡單、高密度、操作電壓低、讀寫速度快、
儲存時間長等優點，故被稱為最具有潛力的次世代非揮發式記憶體。
在本研究的第一部分，利用共濺鍍法將二氧化矽及金銀合金薄膜沈積利用黃光
微影製程定義的TiN 下電極之上，金銀合金成分分別為Au70Ag30 以及Au30Ag70
的CBRAM 元件進行電性量測分析。由於產生加凡尼反應的兩個必要條件，分別
是兩種不同活性金屬是否相接觸以及環境中是否存在電解質與兩金屬接觸。所以
本研究利用低溫電性量測平台在正常大氣環境、真空環境及水氣環境下對不同成
分的上電極所製作的CBRAM 元件進行電性量測。在實驗的過程中，發現只有在
金銀合金作為上電極且須在有水氣存在的情況時，Forming voltage 才會有明顯下降的趨勢，但若上電極是純銀電極的話則不管環境中是否有電解質存在，其
Forming voltage 都不會有明顯的變化趨勢，證實金銀合金作為上電極所發生現象極有可能是加凡尼反應(Galvanic effect)所造成。
在本研究的第二部分，由於前一部分研究發現電解質對於CBRAM 在電致成
型的過程扮演十分重要的角色，所以我設計了兩種不同的CBRAM 元件結構，我
們一樣利用濺鍍法來完成CBRAM 結構的製程，將二氧化矽、銅與碲化銅薄膜沉
積在黃光微影製程定義的TiN 下電極之上，其中一種元件結構是上電極為純銅，
中間層為二氧化矽，下電極為TiN;另一種元件結構與第一種結構類似，只是中間
層除了二氧化矽之外，再加上一層薄的固態電解質碲化銅(CuTe)，將兩種元件去
做電性分析量測之後，發現到有固態電解質的CBRAM 元件可以有較佳的特性，
如:較低的Forming Voltage，較小的操作電流與較大的記憶窗口等，造成這種現
象主要是因為Te 的存在會限制導通路徑銅阻絲的粗細，造成具有固態電解質的
CBRAM 元件的銅阻絲較細，故在阻態切換時，所需要的電荷數目較少，因此切
換速度較快。
在本研究的第三部分，由於前面的研究已經了解到電解質對於CBRAM 電性
上的影響，所以我們更進一步將CBRAM 元件結構改成中間層為固態電解質，研
究所使用的結構是上電極為銅，中間層為碲化銅，下電極為TiN 的CBRAM 元
件，實驗結果發現，中間層改成固態電解質碲化銅後，Forming Voltage 可以下降至1 V 左右，由於用來操作CBRAM 的MOSFET 的閘極氧化層已經微縮到了一
個物理極限，因此CBRAM 的Forming Voltage 勢必要下降，故本實驗此種元件
設計結構，提供了一個極佳的方法來解決微縮所面對的問題。
關鍵字: 電阻式記憶體，金銀合金電極，加凡尼反應，固態電解質

In today's technology life, portable electronic products are indispensable things, and memory plays an important role in these electronic products. With the advance of science and technology, electronic products tend to be thin, light and energy-saving
now; therefore, many research institutes devoted themselves to next generation nonvolatile memory research. RRAM has simple structure, high densities, low operating voltage, fast erase and write speed advantages among other non-volatile memory, so
RRAM is known as the most promising next generation non-volatile memory.
In this thesis first part, we used co-sputtering to deposit SiO2 and Au-Ag alloy thin film on photolithography defined TiN bottom electrode. The ingredient of Au-Ag alloy
is Au70Ag30 and the other is Au30Ag70, and these ingredient concentration CBRAM devices are used to do electrical measurement. Thanks to the two necessary conditions to occur Galvanic effect are two dissimilar conducting materials in electrical contact
with each other and exposed to an electrolyte; hence, we use electrical measurement station to measure the electrical property of different composition top electrode CBRAM devices in atmosphere, vacuum and vapor circumstances. During the execution of experiment, we found that only when Au-Ag alloy electrode
CBRAM devices exist in vapor ambient, the Forming Voltage tends to decrease.
In contrast, when top electrode is pure Ag, regardless of the presence of electrolyte in the circumstance, Forming Voltage will not have obvious decreasing tendency. These experimental results verify that the phenomenon are caused by Galvanic effect.
In this thesis second part, as we find that electrolyte plays an important role in the Forming process of CBRAM in the first part of thesis, so we design two different structure of CBRAM devices. We equally use sputtering to deposit SiO2, Cu, CuTe thin
film on photolithography defined TiN bottom electrode. The structure of the former device is Cu/SiO2/TiN, and the structure of the latter device is Cu/CuTe/SiO2/TiN, which is similar to the former device. The difference between two devices is that the
latter device has a thin solid electrolyte (CuTe) layer more. After doing electrical measurement of two devices, we found that the CBRAM device with solid electrolyte has better performance, for example: lower Forming Voltage, lower operating current
and larger memory window. These experimental results are caused by existence of Te.
Existence of Te will limit the size of Cu filament; hence, the CBRAM devices with solid electrolyte (CuTe) will have smaller size of filament. In conclusion, when CBRAM devices change resistive states, CBRAM devices with solid electrolyte need less charges, which causes faster switching speed.
In this thesis third part, we found that the effect of electrolyte on CBRAM before, so we manufacture a CBRAM device which structure is Cu/CuTe/TiN.
From the experimental results, Forming Voltage can be nearly 1 V. Thanks to that the gate oxide of MOSFET which is used to operate CBRAM is scaled down to physical limit; therefore, the Forming Voltage of CBRAM device must decrease. This structure of
CBRAM device can offer a good method to solve the problem of scaled down.
Key words: RRAM, Au-Ag alloy, Galvanic effect, Solid electrolyte

[1] MBA 置庫百科, 摩爾定律(Moore's Law).
[2] Chi Cun Kuo, I Chieh Chen, Chih Cheng Shih, Kuan Chang Chang, Chao Hsien Huang, Po Hsun Chen, Ting-Chang Chang, Tsung Ming Tsai, Jing Shuen Chang, J. C. Huang, “Galvanic Effect of Au-Ag Electrodes for Conductive Bridging Resistive Switching Memory,” IEEE Electron Device Letters, vol. 36, No. 12, Dec, 2015
[3] M. H. Chi, “Technologies and materials for memory with full compatibility to CMOS,” in ICSICT, 2008, pp. pp. 823-826.
[4] R. Waser, R. Dittmann, G. Staikov, and K. Szot, “Redox-Based Resistive Switching Memories - Nanoionic Mechanisms, Prospects, and Challenges,” Advanced Materials, vol. 21, no. 25-26, pp. 2632, Jul, 2009.
[5] M. Boniardi, D. Ielmini, I. Tortorelli, A. Redaelli, A. Pirovano, M. Allegra, M. Magistretti, C. Bresolin, D. Erbetta, A. Modelli, E. Varesi, F. Pellizzer, A. L. Lacaita, and R. Bez, “Impact of Ge-Sb-Te compound engineering on the set operation performance in phase-change memories,” Solid-State Electronics, vol. 58, no. 1, pp. 11-16, Apr, 2011.
[6] Y. M. Coic, O. Musseau, and J. L. Leray, “A study of radiation vulnerability of ferroelectric material and devices,” IEEE Transactions on Nuclear Science, vol. 41, no. 3, pp. 495-502, Jun, 1994.
[7] J. T. Evans, and R. Womack, “An Experimental 512-Bit Non-Volatile Memory with Ferroelectric Storage Cell,” IEEE Journal of Solid-State Circuits, vol. 23, no. 5, pp. 1171-1175, Oct, 1988.
[8] M. Gajek, M. Bibes, S. Fusil, K. Bouzehouane, J. Fontcuberta, A. E. Barthelemy, and A. Fert, “Tunnel junctions with multiferroic barriers,” Nature Materials, vol. 6, no. 4, pp. 296-302, Apr, 2007.
[9] Y. Meng, L. C. Wu, Z. T. Song, S. Wen, M. H. Jiang, J. S. Wei, and Y. Wang, “Silicon carbide doped Sb2Te3 nanomaterial for fast-speed phase change memory,” Materials Letters, vol. 201, pp. 109-113, Aug, 2017.
[10] J. C. Bruyere, and B. K. Chakraverty, “Switching and negative resistance in thin films of nickel oxide,” Applied Physics Letters, vol. 16, no. 1, p. 40, 1970.
[11] Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu and Simon M. Sze, “Resistance random access memory,” Materials today, vol. 19, issue 5, pp. 254-264, Jun, 2016
[12] K. M. Kim, B. J. Choi, and C. S. Hwang, “Localized switching mechanism in resistive switching of atomic-layer-deposited TiO2 thin films,” Applied Physics Letters, vol. 90, no. 24, pp. 3, Jun, 2007.
[13] A. Sawa, “Resistive switching in transition metal oxides,” Materials Today, vol. 11, no. 6, pp. 28-36, Jun, 2008.
[14] J. Y. Chen, C. L. Hsin, C. W. Huang, C. H. Chiu, Y. T. Huang, S. J. Lin, W. W. Wu, and L. J. Chen, “Dynamic Evolution of Conducting Nanofilament in Resistive Switching Memories,” Nano Letters, vol. 13, no. 8, pp. 3671-3677, Aug, 2013.
[15] P. J. Kuekes, D. R. Stewart, and R. S. Williams, “The crossbar latch: Logic value storage, restoration, and inversion in crossbar circuits (vol 97, pg 034301, 2005),” Journal of Applied Physics, vol. 98, no. 4, pp. 1, Aug, 2005.
[16] X. M. Guan, S. M. Yu, and H. S. P. Wong, “On the Switching Parameter Variation of Metal-Oxide RRAM-Part I: Physical Modeling and Simulation Methodology,” IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 1172-1182, Apr, 2012.
[17] M. M. Appleyard, and C. Brown, “Employment practices and semiconductor manufacturing performance,” Industrial Relations, vol. 40, no. 3, pp. 436-471, Jul, 2001.
[18] K. W. Hillig, “Principles of instrumental analysis, 2nd Edition- SKOOG, DA, WEST, DM,” Journal of the American Chemical Society, vol. 106, no. 5, p. 1536, 1984.
[19] X.G. ZHANG, Uhlig’s Corrosion Handbook, Third Edition, John Wiley & Sons, ch. 10, P. 123 (2011)
[20] Jeonghwan Song , Jiyong Woo , Seokjae Lim , Solomon Amsalu Chekol, and Hyunsang Hwang, “Self-Limited CBRAM With Threshold Selector for 1S1R Crossbar Array Applications,” IEEE Electron Device Letters, vol. 38, no. 11, Nov, 2017
[21] L. Goux, K. Opsomer, R. Degraeve, R. Müller, C. Detavernier, D. J. Wouters, M.
Jurczak, L. Altimime, and J. A. Kittl, “Influence of the Cu-Te composition and microstructure on the resistive switchingof Cu-Te/Al2O3/Si cells,” Appl. Phys. Lett., vol. 99, no. 5, p. 053502, Aug. 2011
[22] J. L. F. Da Silva, S.-H. Wei, J. Zhou, and X. Wu, Appl. Phys. Lett. 91, 091902, 2007
[23] Haitao Sun , Qi Liu , Congfei Li , Shibing Long , Hangbing Lv , Chong Bi , Zongliang Huo , Ling Li , and Ming Liu, “Direct Observation of Conversion Between Threshold Switching and Memory Switching Induced by Conductive Filament Morphology,” Advanced Functional Materials, 24, 5679–5686, 2014
[24] Lee, Jong-Sun, Kim, Dong-Won, Kim, Hea-Jee, Jin, Soo-Min, Song, Myung-Jin, Kwon, Ki-Hyun, Park, Jea-Gun, Jalalah, Mohammed, Al-Hajry, Ali, “Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner,” Journal of The Korean Physical Society, vol. 72, no. 1, p. 116-121, Jan, 2018
[25] M. Kazar Mendes, E. Martinez, A. Marty, M. Veillerot, Y. Tamashita, R. Gassilloud, M. Bernard, O. Renault, N. Barrett, “Forming mechanism of Te-based conductive bridge memories,” Applied Surface Science, vol. 432, part A, p. 34-40, Feb, 2018