半導體產業日新月異，目前在邏輯與記憶體元件尺寸縮小的方面受到嚴峻的挑戰，為了解決尺寸微縮過程中所遇到的問題，以及考量成本與利潤關係，除了改變結構之外，亦可藉由材料的變化來提升元件之電特性。此次研究重點鐵電記憶體(Ferroelectric Random Access Memory, FeRAM)中之鐵電電晶體(Ferroelectric Field Effect Transistor, FeFET)能夠展現出具有低功耗、低操作電壓、高可靠度的優勢，並且可以有效地應用到CMOS製程中，因此其成為新興記憶體中備受矚目的研究方向之一。
本篇論文中，透過在絕緣層上覆矽(Silicon-on-Insulator, SOI)與鐵電層之間沉積一層氮氧化鋁(AlON)以作為介面層(Interfacial Layer, IL)，藉此提升鐵電電晶體的記憶窗口(Memory Window, MW)，並結合鰭式場效電晶體結構(FinFET)，來有效提升電場以及閘極的控制能力。在量測方面，當使用直流(Direct Current, DC)正反掃的情況下，施加直流電壓為 ±4V時，元件之MW可達到1.5V；而當施加脈衝電壓為 ±5V的情況下，寫入抹除的脈衝寬度僅需100 ns，且根據元件之臨界電壓，使用直流進行小範圍電壓下的讀取，可有效降低元件在讀取時所造成的破壞性行為，此時該記憶體之MW更可達到1.59V。另外，利用Sentaurus 3D TCAD模擬軟體以觀察鰭式結構轉角電場增強的現象。本次研究成功製造出鐵電氧化鉿鋯鰭式電晶體之非揮發性記憶體，為避免不同尺寸下之元件的影響，以下元件電特性皆由通道寬度(Fin Width, FW)為60nm以及閘極長度(Gate Length, LG)為100nm的元件尺寸中量測而得。而在耐用度(Endurance)方面，經過10的5次方次的寫入與抹除之循環後，MW仍保持在1.09V，而在耐久度(Retention)方面，則是經過10的4次方秒後，MW仍無明顯的衰退。
此研究中的鐵電氧化鉿鋯鰭式電晶體非揮發性記憶體，除了與現今的FinFET製程相容之外，並具有較大的MW、較快的寫入與抹除之速度，以及良好的可靠度，因此Fe-FinFET在未來具有學術價值與商業量產潛力。

The semiconductor industry is changing with each passing day, and it is currently facing severe challenges in the reduction of logic and memory devices size. In order to solve the problems encountered in the process of size reduction and to consider the relationship between cost and profit, in addition to changing the structure, it can also be improved by changes in materials to promote the electrical characteristics of the component. The focus of this research is that the ferroelectric field effect transistor (FeFET) in the ferroelectric random access memory (FeRAM) can show the advantages of low power consumption, low operating voltage, and high reliability, also can be effectively applied to the CMOS process, so it has become one of the high-profile research directions in the emerging memory.
In this thesis, a layer of aluminum oxynitride (AlON) is deposited between the silicon-on-insulator (SOI) and the ferroelectric layer as the interfacial layer (IL) to improve the memory window (MW) of the Ferroelectric Field Effect Transistor, also combined with the FinFET structure, can effectively improve the electric field and gate control ability. In terms of measurement, when the direct current (DC) is used for positive and negative sweeping, applied the DC voltage is ±4V, the MW of the element can reach 1.5V. When the pulse voltage is ±5V, the pulse width of the program and erase only needs 100 ns, and depending on the threshold voltage of the device, using DC to read a small range of voltage can effectively reduce the destructive behavior. Meanwhile, the MW of the memory can reach 1.59V. In addition, Sentaurus 3D TCAD simulation software was used to observe the phenomenon of electric field enhancement at the corners of the fin structure to enhance FeFET performance. This research successfully produced a ferroelectric HfZrO2 FinFET non-volatile memory. In order to avoid the influence of components of different sizes, the electrical characteristics of the following components are all determined by the fin width of 60nm and the gate length of 100nm component size to measure. In terms of endurance, after 105 cycles of programming and erasing, the MW remained at 1.09V, while in terms of retention, after 104 seconds, the MW was still not noticeable decline.
The ferroelectric HfZrO2 FinFET non-volatile memory in this study is compatible with the current FinFET process and has a larger MW, faster programming and erasing speed, and excellent reliability. Therefore, Fe-FinFET is also a research direction worthy of an in-depth discussion and has potential mass production in the future.

第一章
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