以LaNiO3下電極，開發PZT鐵電記憶體低溫製程之研究

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研究生：	賴昇志 Sheng Chih Lai
論文名稱：	以LaNiO3下電極，開發PZT鐵電記憶體低溫製程之研究
指導教授：	吳泰伯 T. B. Wu
口試委員:
學位類別：	碩士 Master
系所名稱：	工學院 - 材料科學工程學系 Materials Science and Engineering
論文出版年：	2001
畢業學年度：	89
語文別：	中文
論文頁數：	143
中文關鍵詞：	鋯鈦酸鉛、鎳酸鑭、鐵電記憶體、嵌入式記憶體、射頻磁控濺鍍、優選方向、殘留極化量、矯頑電場
外文關鍵詞：	PZT, LNO, FeRAM, Embedded RAM, RF sputtering, prefer orientation, remanent polarization, coercive field
相關次數：	點閱：2 下載：0
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本實驗是以開發Embedded FeRAM為研究主題，因Embedded FeRAM的製程溫度需在500℃以下，故選用合適的底電極是非常重要的。因LNO與PZT同為鈣鈦礦( perovskite )結構，晶格常數相近，且在多篇論文中皆有提到LNO薄膜能使PZT薄膜在低溫結晶，並且能改善PZT薄膜的疲勞特性【84,87】。故本實驗採用LNO薄膜為底電極，並且以射頻磁控濺鍍法直接在高溫鍍製PZT薄膜，使PZT薄膜在鍍製的過程中有足夠的時間與動能結晶，藉此來降低PZT薄膜的製程溫度。除此之外，我們亦改變其他鍍膜參數來達到PZT低溫結晶的目的，如鍍膜氣氛、靶材中之鉛含量及工作壓力等等。
由實驗中發現以純Ar鍍製PZT薄膜，可避免濺鍍原子或離子與氧形成氧化物，而降低濺鍍原子動能；濺鍍功率在40W ( 2-inch )左右時，PZT薄膜有較佳的低溫結晶性；降低靶材之鉛含量，可避免低溫濺鍍時過量之鉛形成PbO；降低工作壓力，可提高濺鍍原子之動能；降低LNO底電極膜厚可減少PZT與LNO之Lattice mismatch，增加成核位置，此皆有助於PZT薄膜於低溫結晶。綜合以上之結果，發現工作氣氛為純Ar、濺鍍功率為40W ( 2-inch )、氧化鉛過量5﹪之PZT靶材、工作壓力2mtorr、LNO底電極膜厚為900 A、Pt為基板下，能使PZT薄膜的結晶溫度降至350℃。

以TiN為基板或降低LNO底電極之膜厚，可減小LNO薄膜沿(100)優選方向成長的效應，促使PZT薄膜沿非(100)方向成長的比例增加，故可提升PZT薄膜的Pr值。

具有LNO上電極之PZT薄膜擁有極佳的疲勞特性，然而濺鍍LNO上電極時，La原子易擴散或濺鍍入PZT薄膜中，雖使得PZT薄膜的Ec值降低，但Pr值亦會因此而降低，且P-E曲線會因此而向右偏移，造成P-E曲線嚴重的左右不對稱。

摘要………………………………………………………………..….…..I
致謝……………………………………………………………….…….III

目錄……………………………………………………………….…….IV

表目錄…………………………………………………...……….…….VII

圖目錄………………………………………………...………………VIII

第一章         緒論……………………………………………………………1

第二章  文獻回顧………………………………………………………3

2-1 晶體結構與極化機制………………………….……………………3

2-2 鐵電薄膜之發展…………………………………………………….4

2-3 鐵電記憶體 ( FeRAM )……………………………………………..6

  2-3.1 鐵電記憶體之原理與發展……………………………………..6

  2-3-2 鐵電記憶體之種類…………………………………….…...….7

    2-3-2.1 破壞式讀取( DRO )……………………………………….7

    2-3-2.2 非破壞式讀取( NDRO ) …………………………………10

  2-3-3 鐵電記憶體之材料……………………………………………11

    2-3-3.1 鐵電薄膜材料………………………………….……...…12

    2-3-3.2 電極材料…………………………………………………14

  2-3-4 鐵電記憶體之特性…………………………………………...17

    2-3-4.1 測量方法…………………………………………………17

    2-3-4.2 鐵電記憶體之疲勞特性…………………………………18

第三章  實驗流程 ……………………………………………………21

3-1 底電極之製作…………………………………………………...…21

  3-1.1 Pt/Ti/SiO2/Si基板之製備……………………………………...21

  3-1.2 LNO薄膜之製備…………………………………………..…..21

  3-1.3 LNO底電極之熱處理……………………………………..…..22

3-2 濺鍍PZT薄膜……………………………………………..……….22

  3-2.1 PZT靶材之製作…………………………………………….…22

  3-2.2 濺鍍PZT薄膜……………………………………………..…..22

3-3 上電極之製作………………………………………….…………..23

  3-3.1 LNO上電極之製作與蝕刻……………………………….…...23

  3-3.2 Pt上電極之製作………………………………………….……23

3-4薄膜分析量測……………………………………………….…...…23

  3-4.1 薄膜結構分析………………………………………….…...…23

  3-4.2 成份分析………………………………………………………23

  3-4.3 厚度量測及表面微觀結構……………………………………23

  3-4.4 成份縱深分析…………………………………………………24

  3-4.5 電性分析………………………………………………………24

第四章  結果與討論…………………………………………..………26

4-1 以高溫退火後的LNO薄膜為底電極，探討PZT的低溫結晶…26

  4-1.0 簡介……………………………………………………………26

  4-1.1 熱處理後之LNO……………………………………………...26

  4-1.2 室溫濺鍍PZT薄膜之post-annealing效應…………………..28

  4-1.3以in-situ方式高溫鍍製PZT薄膜…………………………….30

4-2 以in-situ方式高溫濺鍍PZT薄膜之低溫結晶性探討…………..32

  4-2.0 簡介………………………………………………………....…32

  4-2.1 鍍膜氣氛( Ar/O2 )對PZT結晶性之影響…………………….32

  4-2.2 濺鍍功率對PZT結晶性之影響……………………………...33

  4-2.3 靶材之鉛含量對PZT結晶性之影響………………………...35

  4-2.4 工作壓力對PZT結晶性之影響………………………………36

  4-2.5  LNO底電極厚度對PZT結晶性之影響…………………….37

  4-2.6 不同基板對PZT薄膜結晶性之影響…………………………39

4-3 以TiN為基板………………………………………………….…..40

  4-3.0 簡介……………………………………………………………40

  4-3.1  LNO底電極厚度對PZT結晶性之影響…………………….41

4-4 LNO上電極對PZT薄膜特性之影響……………………………..42

第五章  結論.……………………………………………………….....45

參考文獻……………………………………………………………......47

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