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研究生: 吳家榮
Jia-Rong Wu
論文名稱: 矽晶圓上鍺電容器之高品質閘極氧化層
High-Quality Gate Oxide for Ge Capacitor Fabricated on Si Substrate
指導教授: 巫勇賢
Yung-Hsien Wu
口試委員:
學位類別: 碩士
Master
系所名稱: 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 74
中文關鍵詞:
相關次數: 點閱:3下載:0
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  • 本論文中第一部份主要著重在矽晶圓上形成高濃度鍺 (Ge) 薄膜以及高品質的二氧化矽 (SiO2) 熱氧化層,實驗方法首先是在矽晶圓上蒸鍍鍺薄膜,並經由退火形成單晶矽鍺 (SiGe),後續使用濕式氧化爐管形成矽鍺氧化物 (SiGeOx),利用矽鍺氧化物在混合氣體 (forming gas) 中會還原成鍺的特性,實驗成功的形成了高濃度鍺薄膜,而因為鍺氧化物相當不穩定,所以矽鍺氧化物會不斷經由反應式GeO2 (in solution SiO2) + H2 --> Ge + H2O 將鍺析出,最終形成二氧化矽層。當結構完成之後,輔以材料分析如X射線繞射儀、二次離子質譜儀、穿透式電子顯微鏡、電子繞射圖等儀器針對磊晶鍺薄膜作定性分析,並發現到實驗中形成的鍺薄膜是單晶結構、高濃度且二氧化矽和鍺的介面是相當平坦的。
    論文第二部分主要探討使用NH3、N2O、O2不同氣體處理對氧化層電性的影響,利用在第一部份形成的結構製作成NMOS以及PMOS之鍺電容器,並量測其閘極漏電流、電容電壓特性及磁滯特性曲線。我們發現經過NH3氮化後,雖然能夠有效的提高電容值,但是卻會惡化漏電流、增加電子陷阱 (electron trap) 等效應,然而NH3氮化之後如果再以N2O或O2來修補鍵結,就能夠擁有有效提高電容值、較低漏電流的好處。


    摘要....................................................I 誌謝....................................................II 總目錄..................................................III 圖表目錄................................................V 第一章 序 論 1-1 前言..........................................1 1-2 研究動機......................................4 第二章 文獻回顧第一部份:在矽晶圓上製作鍺電晶體 2-1 經由MHAH方法在矽上異質磊晶鍺..................6 2-2 在矽上使用UHVCVD方法磊晶鍺....................8 2-3 在矽/鍺異質接面上製作鍺電晶體.................8 2-4 在矽上製作應力(Strained)鍺電晶體..............9 第二章 文獻回顧第二部份:鍺電晶體之介電層的演進 2-5 低溫氧化層 (LTO).............................18 2-6 氮氧化鍺 (Germanium Oxynitride)..............19 2-7 高介電係數介電層 (High-k Dielectric).........21 第三章 第一部份:實驗相關原理 3-1 MOSFET的核心:MOS電容........................27 3-2 氧化層與半導體界面上的缺陷...................29 3-3 在矽晶圓上形成單晶結構矽鍺...................29 3-4 經由還原氧化矽鍺 (SiGeOx) 形成鍺.............30 第三章 第二部份:實驗規劃以及元件製程 3-5 鍺薄膜定性分析流程...........................38 3-6 GeMOS電容製作流程............................39 第四章 結果與討論 第一部份:鍺薄膜定性分析 4-1 X射線繞射分析 (X-ray Diffraction)............45 4-2 二次離子質譜儀分析 (SIMS)....................46 4-3 穿透式電子顯微鏡分析 (TEM)...................47 4-4 結構形成機制與應用...........................48 第四章 結果與討論 第二部份:氮化處理對於氧化層 特性之電性分析 4-5 閘極漏電流 (Leakage Current) 分析............50 4-6 電容-電壓特性分析............................51 第五章 結論與未來展望.................................................67 參考文獻...........................................69

    1. K. Mistry, M. Armstrong, C. Auth, S. Cea, T. Coan, T. Ghani, T.Hoffman, A. Murthy, J. Sandford, R. Shaheed, K. Zawadzki, K. Zhang, S. Thompson and M. Bohr, “Delaying Forever:Uniaxial Strained Silicon Transistors in a 90 nm CMOS Technology, ” Symp. VLSI Tech. Dig., pp. 50-51, 2004.
    2. Krishna. C. Saraswat, Chi On Chui, Tejas Krishnamohan, Ammar Nayfeh and Paul McIntyre, “Ge based high performance nanoscale MOSFETS, ” Microelectronic Engineering., vol. 80, pp. 15-21, 2005.
    3. F. Y. Huang, S. G. Thomas, M. Chu, K. L. Wang, and N. D.
    Theodore in IEDM Tech. Dig., pp. 665 ,1996.
    4. P. J. Wang, F. F. Fang, B. S. Meyerson, J. Nocera, and B. Parker, Appl. Phys. Lett., vol. 54, pp. 2701, 1989.
    5. G. G. Fountain, R. A. Rudder, S. V. Hattangady, D. J. Vitkavage, R. J.Markunas, and J. B. Posthill, “Electrical and microstructural characterization of an ultrathin silicon interlayer used in a silicon dioxide/germanium-based MIS structure,” IEEE Electron Device. Lett., vol. 24, pp. 1010–1011,1988.
    6. Y. Wang, Y. Z. Hu, and E. A. Irene, “Electron cyclotron resonance plasma and thermal oxidation mechanisms of germanium,” J. Vac. Sci.Technol. A, vol. 12, pp. 1309-1314, 1994.
    7. O. J. Gregory, E. E. Crisman, L. Pruitt, D. J. Hymes, and J. J.Rosenberg, “Electrical characterization of some native insulators on germanium,” Mat. Res. Soc. Symp. Proc., vol. 76, pp. 307–311, 1987.
    8. D. J. Hymes and J. J. Rosenberg, “Growth and materials
    characterization of native germanium oxynitride thin films on germanium,” J. Electrochem. Soc., vol. 135, pp. 961–965, 1988.
    9. S. C. Martin, L. M. Hitt, and J. J. Rosenberg, “P-channel germanium MOSFETs with high channel mobility,” IEEE Electron Device Lett., vol. 10, pp. 325–326, 1989.
    10. D. S. Yu, C. H. Huang, A. Chin, C. Zhu, M. F. Li, B. J. Cho, and D. L. Kwong, “Al2O3 -Ge-on-insulator n- and p-MOSFETs with filly NiSi and NiGe dual gates,” IEEE Electron Device Lett., vol. 25, pp. 138–140, 2004.
    11. Chia Ching Yeo, Byung Jin Cho, F. Gao, S. J. Lee, M. H. Lee, C.-Y. Yu, C. W. Liu, J. Tang, and T. W. Lee, “Electron Mobility Enhancement Using Ultrathin Pure Ge on Si Substrate,’’ IEEE Electron Device Lett., vol. 26, pp. 761–763, 2005.
    12. A. Ritenour, S. Yu, M. L. Lee, N. Lu,W. Bai, A. Pitera, E. A. Fitzgerald, D. L. Kwong, and D. A. Antoniadis,“Epitaxial strained germanium p-MOSFETs with HfO2 gate dielectrics and TaN gate electrode,” IEDM Tech. Dig., pp. 433–436, 2003.
    13. F. A. Trumbore, “Solid solubilities of impurity elements in germanium and silicon,” Bell Syst. Tech. J., pp. 205, 1960.
    14. A. Nayfeh, C. O. Chui, K. C. Sarawat, “Effect of hydrogen annealing on heteroepitaxial-Ge layers on Si Surface roughness and electrical quality,’’ Appl. Phys. Lett., vol. 85, no. 14, pp. 2815-2817, 2004.
    15. A. Nayfeh, C. O. Chui, K. C. Sarawat, “Fabrication of High-Quality p-MOSFET in Ge Grown Heteroepitaxially on Si,’’ IEEE Electron Device Lett., vol. 26, pp. 311–313, 2005.
    16. Minjoo L. Lee, C. W. Leitz, Z. Cheng, A. J. Pitera, T. Langdo, M. T. Currie, G. Taraschi, and E. A. Fitzgerald, “ Strained Ge Channel p-type metal-oxide-semiconductor field effect transistors grown on Si1-xGex/Si virtual substrate,’’ Appl. Phys. Lett., vol. 79, no. 20, pp. 3344-3346, 2001.
    17. Tejas Krishnamohan, Zoran Krivokapic, Ken Uchida, Yoshio Nishi, Krishna C. Saraswat, “Low Defect Ultra-thin Fully Strained-Ge MOSFET on Relaxed Si with High Mobility and Low Band-To-Band-Tunneling (BTBT),’’ Symp. VLSI Tech. Dig., pp. 82-83, 2005.
    18. O. J. Gregory, E. E. Crisman, L. Pruitt, D. J. Hymes, and J. J. Rosenberg, “Electrical characterization of some native insulators on germanium,” Mater. Res. Soc. Symp. Proc., vol. 76, pp. 307–311,1987.
    19. Y.Wang, Y. Z. Hu, and E. A. Irene, “Electron cyclotron resonance plasma and thermal oxidation mechanisms of germanium,” J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 12, no. 4, pp. 1309–1314,1994.
    20. R. S. Johnson, H. Niimi, and G. Lucovsky, “New approach for the fabrication of device-quality Ge/GeO2/SiO2 interfaces using low temperature remote plasma processing,” J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 18, no. 4, pp. 1230–1233, 2000.
    21. D. J. Hymes and J. J. Rosenberg, “Growth and materials
    characterization of native germanium oxynitride thin films on germanium,” J. Electrochem. Soc., vol. 135, no. 4, pp. 961–965,1988.
    22. Z. Sun and C. Liu, “Plasma anodic oxidation and nitridation of Ge(111) surface,” Semicond. Sci. Technol., vol. 8, no. 9, pp. 1779–1782, 1993.
    23. L. L. Chang and H. N. Yu, “The germanium insulated-gate field effect transistor (FET),” Proc. IEEE, vol. 53, no. 3, pp. 316–317,1965.
    24. G. G. Fountain, R. A. Rudder, S. V. Hattangady, D. J. Vitkavage, R. J. Markunas, and J. B. Posthill, “Electrical and microstructural characterization of an ultrathin silicon interlayer used in a silicon dioxide/germaniumbased MIS structure,” IEEE Electron Device. Lett., vol. 24, no. 16, pp. 1010–1011, 1988.
    25. W. P. Bai, N. Lu, J. Liu, A. Ramirez, D. L. Kwong, D. Wristers, A. Ritenour, L. Lee, and D. Antoniadis, “GeMOScharacteristics with CVD HfO2 gate dielectrics and TaN gate electrode,” VLSI Symp.Tech. Dig., pp. 121–122, 2003.
    26. A. Ritenour, S. Yu, M. L. Lee, N. Lu,W. Bai, A. Pitera, E. A. Fitzgerald, D. L. Kwong, and D. A. Antoniadis, “Epitaxial strained germanium p-MOSFETs with HfO2 gate dielectric and TaN gate electrode,” IEDM Tech. Dig., pp. 433–436, 2003.
    27. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, “A germanium NMOSFET process integrating metal gate and improved hi-k dielectrics,” IEDM Tech. Dig., pp. 437–440, 2003.
    28. J. J. Chen, N. A. Bojarczuk, H. Shang, M. Copel, J. B. Hannon, J. Karasinski, E. Preisler, S. K. Banerjee, and S. Guha, “Ultrathin Al2O3 and HfO2 gate dielectrics on surface-nitrided Ge,” IEEE Trans. Electron Devices, vol. 51, no. 11, pp. 1441–1447, 2004.
    29. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat,“ Atomic Layer Deposition of High-k Dielectric for Germanium MOS Applications - Substrate Surface Preparation,’’ IEEE Electron Device Lett., vol. 2, no. 5, pp. 274–276, 2004.
    30. J. P. Xu, P. T. Lai, C. X. Li, X. Zou, and C. L. Chan, “Improved Electrical Properties of Germanium MOS Capacitors With Gate Dielectric Grown in Wet-NO Ambient,’’ IEEE Electron Device Lett., vol. 27, no. 6, pp. 439–441, 2006.
    31. H. Shang, M. M. Frank, E. P. Gusev, J. O. Chu, S. W. Bedell, K. W. Guarini, and M. Ieong, IBM J. Res. Dev. 50, pp. 377, 2006.
    32. W. P. Bai, N. Lu, J. Liu, A. Ramirez, D. L. Kwong, D. Wristers, A. Ritenour, S. Yu, L. Lee, and D. A. Antoniadis, Proceedings of the Symposiums on VLSI Technology, pp. 121–122, 2003.
    33. S. J. Whang, S. J. Lee, F. Gao, N. Wu, C. X. Zhu, J. Pan, L. J. Tang, and D. L. Kwong, IEDM Tech. Dig, pp.307, 2004.
    34. N. Wu, Q. Zhang, C. Zhu, C. Yeo, S. J. Whang, D. S. H. Chan, M. F. Li, A. Chin, D. L. Kwong, A. Y. Du, C. H. Tung, and N. Balasubramanian, Appl. Phys. Lett. vol. 85, pp. 4127, 2004.
    35. K. H. Kim, R. G. Gordon, A. Ritenour, D. A. Antoniads, “Atomic layer deposition of insulating nitride interfacial layers for germanium metal oxide semiconductor field effect transistors with high- k oxide/tungsten nitride gate stacks,’’ Appl. Phys. Lett. vol. 90, pp.212104, 2007.
    36. T. Sugawara, Y. Oshima, R. Sreenivasan, P. C. Mclntyre, “Electrical properties of germanium/metal-oxide gate stacks with atomic layer deposition grown hafnium-dioxide and plasma-synthesized interface layers,’’ Appl. Phys. Lett. vol. 90, pp. 112912, 2007.
    37. M. M. Frank, S. J. Koester, M. Copel, J. A. Ott, “Hafnium oxide gate dielectric on sulfur-passivated germanium,’’ Appl. Phys. Lett. vol. 89, pp. 112905, 2006.
    38. G. Nicolas, D. P. Brunco, A. J. V. Steenbergen, F. Bellenger, M. Houssa, M. Caymax, M. Meuris, Y. Panayiotatos, A. Sotiropolus, ’’Germanium MOSFETs With CeO2/HfO2/TiN Gate Stacks,’’ IEEE Trans. Electron Devices, vol. 54, no. 6, pp. 1425-1430, 2007.
    39. Y. H. Wu, W. J. Chen, A. Chin and C. Tsai, “The effect of native oxide on epitaxial SiGe from deposited amorphous Ge on Si,’’ Appl. Phys. Lett., vol. 74, no. 4, pp. 528-530, 1999.
    40. W. S. Liu, J. S. Chen, D. Y. C. Lie, and M.-A. Nicolet, “Ge epilayer of high quality on a Si substrate by solid-phase epitaxy,’’ Appl. Phys.Lett., vol. 63, no. 10, pp. 1405-1407, 1993.

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