由於超大型積體電路上晶片密度不斷地增加和元件尺寸不斷地縮小，持續升高的運作溫度成為一個重要的議題。高溫不但降低了晶片的功能性和可靠度，同時也造成昂貴的封裝花費，一顆晶片的最高溫度能達到多少成為晶片設計上的一個重要考量。因此，本論文試著找出晶片最高溫度的界限，並且提供製造出此高溫的測試向量。我們應用基因演算法和螞蟻演算法來達成尋找晶片最高溫度的目標，最後的實驗結果顯示在TSMC 0.18um 的製程下，相較於隨機處理，我們的方法對ISCAS'85組合電路和ISCAS'89循序電路分別得到39.03%和6.80%的高溫。

With the continuing increase of chip density and the shrinkage of feature size of transistor in VLSI circuits, high temperature has become a concerned issue. High temperature not only decreases the reliability of chips, but also causes high package cost in order to cool down the system. For design consideration, one important issue related to temperature is how hot the chip may be. Thus, this paper investigates on the lower bound of peak temperature of a packaged chip and on the patterns that cause such bound. Two algorithms, Genetic Algorithm and Ant Colony Optimization, are applied for finding this lower bound of peak temperature. Experimental results show that the proposed approach obtains an average of 39.03% higher lower bound for ISCAS'85 combinational benchmarks and 6.80% for ISCAS'89 sequential benchmarks as compared to random approach under the TSMC 0.18um library.

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