複雜的單晶片系統(SoC)設計對於第三協力廠商所提供可再使用的矽智產(IP)需求越來越高。然而，想要提供不同抽象層次、而令顧客產生高信心水準的可模擬模組與保障交易安全以防被竊取矽智產內部資訊在之前提出的相關研究中是彼此互相衝突的！
在本篇論文中，透過PLI介面程式與特殊設計的網路通訊協定，我們的軟體可使得原先矽智產廠商與客戶端原有的硬體語言模擬器具備遠端同步模擬的功能。唯獨在輸入埠與輸出埠介面的測試資料子和反應訊息能夠在網際網路上被傳送。藉此，廠商們不需重新用其他非硬體語來撰寫言功能模組或是對原先的模組作加密保護。而使用者也可確定他所購置的矽智產與在之前評估時的模組相同一致。除了由網路傳輸所導致的時間延遲效應之外，整顆單晶片系統的設計過程就如同於真正獲取矽智產的設計過程，毫無差異。

這個提出的系統建構在客戶端/伺服器端架構上。我們的軟體可以自動的產生在架構中所有需要的檔案。只能存取介面訊號的特性保持矽智產能安全的執行同步模擬而不會被竊取內部電路設計。單週期的評估機制使得客戶端與伺服器端能達成同步。然而，封包壓縮的技巧展現出大幅減少了轉換延遲的效果。網路頻寬形成了唯一的技術瓶頸。但這項問題可期待在未來的寬頻時代獲得解決。

本論文最大的貢獻在於幫助了所有矽智產提供廠商能夠讓他們的矽智產可以在既不用提供更多的人力資源又安全地保障商業機密的前提下，被有興趣的使用者測試使用進而購置矽智產。

We propose an Internet-based concurrent-simulation scheme to ease IP evaluation process between IP vendors and users. Complex system-on-a-chip design requires more and more IP modules from 3rd party vendors. What can be disclosed by the vendor without impairing its trade secrete and what needs to been examined by the user to gain satisfactory level of confidence are contradictory of each other. Via PLI interface functions and Internet protocol, our proposed software enables HDL simulators (Verilog) residing in both the vendor and user’s sites to concurrently simulate the IP and SOC together. Only stimulus and response defined in the IP’s module I/O are exchanged between the sites. Therefore, the vendor need not to create a functional model (or encrypted code) for the IP while the user is assured what he/she simulates is what he will purchase. Beside simulation speed degradation due to communication overhead, the SOC design/debug process is exactly same as if the IP is in the user’s hand. Our contribution will help all IP providers expose their IPs to all potential users without human intervention and IP right infringement concern.

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