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研究生: 陳闕民
Chiue-Min Chen
論文名稱: 虛擬輸入、動態輸出佇列於網路處理器系統上之應用與研製
The Design and Implementation of Virtual Input Queue / Dynamic Output Queue On Network Processor System
指導教授: 黃能富
Nen-Fu Huang
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 通訊工程研究所
Communications Engineering
論文出版年: 2001
畢業學年度: 89
語文別: 中文
論文頁數: 61
中文關鍵詞: 網路處理器虛擬輸入佇列動態輸出佇列前端資料阻塞直達式
外文關鍵詞: Network Processor, Virtual Input Queue, Dynamic Output Queue, Head of Line Blocking, Cut Through, NPU, VIQ, DOQ
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  • 網路的使用愈來愈普及,相對的也發展出許多新的服務及應用來
    因應使用者的須求。為了加快這些服務的處理速度,網路設備廠商就

    會將這些網路服務製成硬體ASIC,提昇處理效能。但開發ASIC所需的

    時間冗長費時,往往趕不上新的服務所發展的速度;另一方面,製成

    ASIC後,若有問題亦不能輕易修改,因此所需的人力物資成本非常高

    ,為了解決原先網路設備開發上的缺點,於是就有了網路處理器

    (Network Processor) 的概念;其主要構想是設計一顆專門用來處理

    網路資訊處理器,可以利用它來設計相關處理網路服務的程式。好處

    是它內部即有處理網路資訊的指令,可減少開發產品的時間;另外,

    它可依使用者所須,開發不同的應用,並且可以隨時修正更改,減少

    設計錯誤造成的風險,增加網路設備設計上的彈性,因此其為將來網

    路處理最佳解決方案。

    但網路處理器的概念目前尚未成熟。就我們所選擇的網路處理器

    而言,由於其硬體架構的關係,會有與縱橫式(Crossbar)交換器類似

    的前端資料阻塞(Head of line blocking) 問題,因此我們設計虛擬

    輸入佇列(VIQ) ,讓輸入封包標頭先轉送到記憶體,使新的封包能夠

    及時被處理,解決輸入端的瓶頸。另外若輸出佇列只有一個,將不能

    及時處理大量連續的輸出封包,因此設計了動態輸出佇列(DOQ) ,使

    連續輸出資料不會受影響,如此,一方面可補強原先輸入端設計架構

    的不足,另一方面讓原先輸出端的架構,能發揮最好的使用性。

    動態輸出佇列的情況下,所能提昇的效能及結果分析,讓網路處

    理器發揮最佳的效能。


    Because of the more and more popularity of Internet,
    more and more new services and applications are created to

    meet the user's requirements. In order to speed up the ser-

    vice processing, many of the network manufactures like to

    implement such network services into Hardware ASIC to enhance

    the performance. But it takes a very long time to design an

    ASIC so that the speed of development time could not meet the

    requirement of the demands of new services, and cost is still

    an important issue as well. That's why we need Network Pro-

    cessor, a brand new concept to solve these probelms. The main

    idea of NP is to design a programmable processor that is able

    to process the network information case by case according to

    the micro code inside. By the help of micro code,the enter-

    prises could save the development time. Because NP is programm-

    able and even in case modification is necessary, all you have

    to do is downloading a new image code into NP instead of

    making another new hardware instance. The whole hardware

    architecture could remain unchanged. It goes without saying

    that user could develope any kind of network applications on

    their own demand under the NP architecture. Still the same,

    in most case the only thing needed to do is putting a new

    image code into the NP.

    Although there are several companies making good NPs, but

    the prefect NP is still not available and the system perfor-

    mance will be bounded by NP design. Let's take the NP we

    choosed as an example, it will have the same problem named

    'head of line blocking' with the common Crossbar Switch because

    of its hardware design. In order to solve that problem, we've

    designed a Virtual Input Queue(VIQ) as a solution. Another pro-

    blem is that there is only one output queue inside the NP, and

    it could be happened to lost packets in burst condition. So

    that we design the Dynamic Output Queue (DOQ) to solve this

    problem.

    Finally we designed several test cases for analyzing accor-

    ding to the above architecture, and we've proved that the NP

    could raise its performance by the help of VIQ and DOQ.

    目錄 i 圖形列表 iii 第一章 導論 1 1-1 網路的發展 1 1-2 網路處理器在網際網路中所扮演的角色 2 1-3 為何須要VIQ / DOQ及硬體上的限制 2 第二章 網路處理器介紹 4 2-1 網路處理器特性介紹及比較 4 2-1-1 Intel IXP1200網路處理器硬體特性 4 2-1-2 IBM IBM32PR161EPXCAC133網路處理器硬體特性 6 2-1-3 MMC GPIF-207網路處理器硬體特性 8 2-1-4 Vitesse IQ2000網路處理器硬體特性 11 2-1-5 各廠牌網路處理器相同特性比較 14 2-1-6 選擇Vitesse IQ2000晶片的原因 16 2-2 系統硬體架構 17 2-3 軟體架構 19 2-4 封包格式 22 2-4-1 封包輸入格式 22 2-4-2 封包輸出格式 26 2-5 封包標頭緩衝區的直達式處理 30 第三章 交換平台種類介紹 35 3-1縱橫式交換平台 35 3-2 無阻塞共享記憶體交換平台 36 3-3 提昇交換平台效能的方式 37 3-3-1 輸出佇列(Output Queue) 38 3-3-2 輸入佇列(Input Queues) 38 3-3-3 整合輸入輸出佇列(CIOQ) 縱橫式交換平台 40 第四章 將VIQ及DOQ應用在網路處理器系統上 42 4-1 將虛擬輸入佇列及動態輸出佇列應用於 網路處理器的理由 42 4-2 虛擬輸入佇列設計架構 45 4-3 DOQ設計架構 45 4-4 整合方式 48 第五章 VIQ / DOQ測試平台與結果 50 5-1 測試環境 50 5-2 測試參數設定及結果 52 5-3 實驗的結果及增加效能的比例 56 第六章 結論 58 參考資料 59

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