多通道陣列之腦波細胞的神經訊號量測，提升了腦波分析時所需要的資訊量，但也同時增加了硬體實現的困難度。因此，突顯了於前端硬體電路中之腦波資料壓縮的重要性。神經細胞分類，為一種在時域特徵的資料壓縮架構，透過神經細胞分類，記錄不同神經細胞所觸發電壓訊號 (spike) 的時間與頻率，避免傳送大量的原始波型於後級。在頻率特徵的部份，則透過濾波器的設計，留下具有生理訊號意義的特徵，避免大量原始資料的處理。本論文以神經細胞分類系統為例，提出在時域特徵的硬體電路設計，簡化所需要的硬體資源。在頻率特徵方面，則以腦內深層閉迴路刺激為例，進行演算法的簡化與系統實現。

時域特徵的實現，一般應用於神經科學領域的微電子系統，是先將微小的神經電壓訊號放大後，再將其放大後的類比電壓訊號轉換為數位訊號。因此在電壓轉換數位訊號時的訊雜比，將受限於電晶體操作的電壓動態範圍。類比轉時間轉換器 (Analog-to-time converter, ATC) 能避免受到電壓動態範圍的限制，透過電路的正回授機制，將類比電壓轉換為脈波的時間寬度訊號。針對ATC輸出之脈波時間訊號，則是透過時間數位轉換器 (Time-to-digital converters, TDC) 將脈波時間寬度轉換為數位訊號。有別於一般TDC的動態範圍不夠寬的缺點,本論文提出兩種TDC的架構皆可提供4096:1的高動態範圍: 雙刻度計數器 (Dual-scale counter, DSC) 可提供最少的晶片面積; 延遲線計數器 (Delay-line counter, DLC) 則可提供最少的晶片功耗。TDC所輸出的數位訊號，則使用二維乘法累加器 (Two-dimensional multiply-accumulator, 2D-MAC) 的乘加器進行後續的計算。此ATC已實現於標準的0.35微米半導體製程，可提供6位元之脈波寬度轉換為數位訊號的解析度。TDC與2D-MAC則是透過場域可編程邏輯閘陣列 (Field programmable gate array, FPGA) 進行實現。最後，此方法實際整合應用於神經訊號的分類功能，以進行功能展示與驗証。

在頻率域方式的實現，有別於一般小波轉換 (Wavelet transform, WT) 於硬體實現方面，需使用多組不同頻率的濾波器，且濾波器之係數為符點數之缺點, 本論文以WT為基礎，提出 (Simplified discrete wavelet transform, Sim-DWT) 以解決使用多組濾波器與系數為符點數的缺點。 本論文以Sim-DWT演算法進行局部場電位 (local field potential, LFP) 神經訊號中的高電位震盪 (high-voltage spindles, HVSs) 特徵的偵測。以低階8位元的微處理器為實現平台，其時脈為8MHz，並佔用4資料點 (約32位元) 的資料暫存空間，其含接口(IO)的整體功耗約為6mW。Sim-DWT具備低硬體資源的特點，適合用於低階的微處理器或是實現於低功耗的專用集成電路 (Application specific integrated Circuit, ASIC) 晶片中。此系統已實測於動物實驗，並於Sim-DWT中，以不同母波函式 (Haar, DB4, Morlet) 分析其偵測HVS的準確率。分析結果可得知，依偵測HVS訊號特徵方面，使用DB4的母波函式可達到與電腦平台相當的準確率。未來，Sim-DWT可進一步整合至閉迴授之腦內深層電刺激微系統。

Microelectrode arrays have been widely used to measure neural activity in vivo. However, it also increases the complexity of hardware design, because data compression becomes essential for efficient data transmission and closed-loop neuromodulation. In the time domain, spike sorting is needed to record a specific neuron's firing time and frequency information without analyzing a large number of data points. In the frequency domain, only the frequency bands of specific bio-markers are filtered out. In this thesis, the design of hardware-efficient algorithms for both time and frequency domains of data compression have been proposed.

In the time-domain implementation, conventional neuroelectronic interfaces employ circuits in the voltage domain to amplify neural signals and convert the analog signals into digital data for further calculation. The signal-to-noise ratio and the dynamic range of the amplifier are restricted by the supply voltage. To alleviate this limitation, this thesis uses an analog-to-time converter (ATC) to convert analog local field potential (LFP) signals into a series of pulse-width modulated signals. The pulse signals are then converted into digital data by time-to-digital converters (TDCs). Customer designed TDCs are further proposed to extend the dynamic range to $4096:1$. The Dual-scale counter (DSC) minimizes area consumption, and the Delay-line counter (DLC) minimizes the power consumption. The two-dimensional multiply-accumulator (2D-MAC) for processing the data outputs from TDCs have also been proposed, and can separate spikes without calculating the product sum of the 2D-MAC. Finally, the implementation of the time domain classifier is realized in FPGA for sorting neuronal spikes.

In the frequency-domain implementation, to detect high-voltage spindle (HVSs) in the LFP signals. An optimized discrete wavelet transform, called the Simplified discrete wavelet transform (Sim-DWT) algorithm, is proposed. The Sim-DWT algorithm has been implemented in a low-end, eight-bit micro-controller to extracting the features of HVSs with a frequency ranging from 5 to 15 Hz. Sim-DWT requires only four samples of 8-bit data in each calculating buffer (an operation window), and requires no multiplication. These features make Sim-DWT easy to implement in a low-end MCU or ASIC. The Sim-DWT algorithm realized in an eight-bit MCU consumes only 6-mW including IO ports. Finally, the ability of the Sim-DWT-base system is examined by detecting HVSs in LFP signals in rat experiments.

Three types of mother wavelet functions: Haar, DB4, Morlet in typical, have been transformed as the cMW functions and compared. The experimental results point out that, by designing the cMW function appropriately in the Sim-DWT algorithm, HVSs can be detected reliably. The accuracy is comparable th that in PC simulation. Therefore the proposed Sim-DWT is suitable for implementation as a digital core in a microsystem for closed-loop, deep brain stimulation (DBS) in the future.

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