隨著科技的進步，現代人對於優質的生活環境及健康的身體狀況，其需求有增加的趨勢。醫療照護、營養的攝取與公共衛生等技術的進步，使社會逐漸轉型為高齡化社會，健康照護的需求或者是慢性病所需要長時間紀錄並且能夠即時地監控人體各種生醫訊號的醫療儀器設備的需求日益增加。而腦波訊號是反映人體生理指數的重要指標之一，臨床醫療上常有連續式腦電波量測的長時間監測與紀錄的需求，如癲癇、阿茲罕默症、憂鬱症與精神分裂疾病，皆屬於患者的偶發性腦波不正常放電。近幾年的研究中，愈來愈多的文獻投入在研究人體各類生理訊號的特性以及其應用的擷取系統電路，並且將積體電路晶片整合成適用於長時間監測與擁有可攜式特性的裝置。在這類裝置中，避免雜訊干擾，進而把將感測到的微弱生理訊號加以放大，即為最前端的低雜訊前端生醫放大器。
本篇研究為針對擷取腦波訊號設計的可程式化增益之多通道低雜訊前端擷取電路，低雜訊生醫訊號前端電路採用擁有全差動儀表放大器做為低雜訊的第一級核心放大器設計，電晶體在低頻時受到閃爍雜訊影響相當嚴重，進一步使用截波穩定技術輔助我們有效地減少電路中的閃爍雜訊，而截波穩定放大器下一級採用低轉導電容濾波器來濾除我們感興趣頻帶以外的雜訊，為了避免輸出訊號飽和利用可調增益放大器來調整適當的輸出訊號振幅，最後透過類比數位轉換器將擷取到的訊號轉換成數位碼送至後端數位訊號處理做數據紀錄與分析。本篇研究使用TSMC 90nm CMOS 標準製程實現。在0.5 V供應電壓下整體系統電路總功率消耗為29.08 μW。低雜訊生醫訊號前端電路在EEG的頻寬範圍內，其輸入總等效雜訊為0.358 μVrms，NEF為2.43，PEF為2.95，共模互斥比為91.9 dB，其模擬結果顯示此電路適用於腦波訊號之生醫訊號擷取系統。

Abstract
In recent years, bio-medical electronics have been developed rapidly, especially the application of portable bio-potential signal acquisition. The bio-potential signals most commonly used in medical diagnoses include EEG, ECG and EMG, etc. However, the recordings of these signals are inconvenient and uncomfortable for patients, because they need to be connected to a stationary and bulky instrument during the examination. Moreover, the bio-potential signals reflect the physiological status of patients. In order to acquire the physiological information from patients effectively, recording multi-point at the same time is important. Therefore, there are growing demands for small size and multi-channel bio-potential signal acquisition system to improve the patients’ quality of daily life.
This article presents a programmable low-noise readout front-end suitable for Electroencephalogram (EEG) acquisition. The chip includes 8-channel fully-differential chopper instrumentation amplifiers each with a small Gm-C low-pass filter, a programmable gain amplifier. The chip is fabricated with the TSMC 90nm CMOS process. The analog readout front-end has simulated frequency response from 0.57 Hz to 213 Hz, programmable gain from 54.4 dB to 87.6 dB, integrated input-referred noise of 0.358μVrms within EEG bandwidth, a noise efficiency factor (NEF) of 2.43, a power efficiency factor (PEF) of 2.95. The overall system consumes 29.08 µW under 0.5-V supply.

[1] R. F. Yazicioglu, “Bio-Medical CMOS ICs Integrated Circuits and Systems,” in Book Part 1, 2011, pp. 125–155.
[2] E. T. McAdams, Encyclopedia of Medical Devices and Instrumentation. J. G. Webster, 2002
[3] Malmivuo, J., Plonsey, R., Bioelectromagnetism-Principles and Applications of Bioelectric and Biomagnetic Fields, New York OXFORD UNIVERSITY PRESS. 1995
[4] M. R. Nuwer et al., "IFCN standards for digital recording of clinical EEG," Electroencephalogr. Clin. Neurophysiol., vol. 106, no. 3, pp.259–261, Mar. 1998.
[5] Reid R. Harrison and Cameron Charles, " A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications," IEEE J. Solid-State Circuits, vol. 38, no. 6, June. 2003
[6] K. A. Ng and P. K. Chan, "A CMOS analog front-end IC for portable EEG/ECG monitoring applications," IEEE Trans. Circuits Syst.-I: Regular Papers, vol. 52, no. 11,pp. 2335-2347, Nov. 2005.
[7] H. Alzaher and M. Ismail, "A CMOS fully balanced differential difference amplifier and its applications," IEEE Trans. Circuit Syst. II, Analog Digit. Signal Process., vol. 48, no. 6, pp. 614–620, Jun. 2001.
[8] Y. Tao, Y. Haigang, Y. Quan, and C. Guoping, "Noise Analysis and Simulation of Chopper Amplifier," IEEE Asia Pacific Conference in Circuits and Systems, 2006, pp. 167-170.
[9] T. Denison, K. Consoer, W. Santa, A. T. Avestruz, J. Cooley, and A. Kelly, "A 2μW 100 nV/rtHz Chopper-Stabilized Instrumentation Amplifier for Chronic Measurement of Neural Field Potentials, " IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2934–2945, Dec. 2007.
[10] Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001
[11] K.K.Hung, P.K.Ko, C.Hu, Y.C.Cheng, "A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors," IEEE Transactions on Electron Devices, vol.37, pp.654-665, March. 1990
[12] F. N. Hooge, "1/f noise sources," IEEE Trans. Electron Devices, vol.41, pp. 1926–1935, Nov. 1994.
[13] E. P. Vandamme, L. K. J. Vandamme, C. Claeys, E. Simoen, and R. J.Schreutelkamp, "Impact of silicidation on the excess noise behavior of MOS transistors," Solid-State Electron., vol. 38, pp. 1893–1897, Nov.1995.
[14] K.K.Hung, P.K.Ko, C.Hu, Y.C.Cheng, "A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors," IEEE Transactions on Electron Devices, vol.37, pp.654-665, March. 1990
[15] M.J.Kirton, M.J.Uren,"Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise," Advances in Physics, vol.38, pp.367-468
[16] C. C. Enz, F. Krummenacher, and E. A. Vittoz, "An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications," Analog Integrated Circuits and Signal Processing, vol. 8, pp.83–114, 1995.
[17] M. Bucher, D. Kazazis, F. Krummenacher, D. Binkley, D. Foty, andY. Papananos, “Analysis of Transconductances at All Levels of Inversion in Deep Submicron CMOS,” in Electronics, Circuits and Systems,International Conference on, vol. 3, 2002, pp. 1183–1186.
[18] C.Enz, "An MOS transistor model for RF IC design valid in all regions of operation," IEEE Transactions on Microwave Theory and Techniques, vol.50, pp.342-359, Jan. 2002
[19] E.A. Vittoz, C.C. Enz, Sub-threshold Design for Ultra Low-Power Systems, Springer, 2006
[20] Xinbo Qian, Yong Ping Xu, and Xiaoping Li, "A CMOS Continuous-Time Low-Pass Notch Filter for EEG Systems," Analog Integrated Circuits and Signal Processing, 44, 231–238, 2005
[21] R. Muller, S. Gambini, and J. Rabaey, “A 0.013mm2 5µW DC-Coupled Neural Signal Acquisition IC With 0.5V Supply,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb 2011, pp. 302–304.
[22] Rikky Muller, Simone Gambini, and Jan M. Rabaey, “A 0.013mm2 5μW DC-coupled neural signal acquisition IC with 0.5V supply,” IEEE J. Solid-State Circuits, vol. 7, no. 1, Jan 2012
[23] X. Zou, W.-S. Liew, L. Yao, and Y. Lian, “A 1V 22µW 32-Channel Implantable EEG Recording IC,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb 2010, pp. 126–127.
[24] S.-Y. Lee and C.-J. Cheng, “Systematic Design and Modeling of a OTA-C Filter for Portable ECG Detection,” IEEE Tran. Biomed. Circuits and Syst., vol. 3, no. 1, pp. 53–64, Feb 2009.
[25] Xinbo Qian, Yong Ping Xu, and Xiaoping Li, "A CMOS Continuous-Time Low-Pass Notch Filter for EEG Systems," Analog Integrated Circuits and Signal Processing, 44, 231–238, 2005
[26] L. Luh, J. Choma, and J. Draper, "A continuous-time common-mode feedback circuit (CMFB) for high-impedance current-mode applications," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.47, no. 4, pp. 363–369, Apr. 2000
[27] X. Zou, X. Xu, L. Yao, and Y. Lian, “A 1-v 450-nw fully integrated programmable biomedical sensor interface chip,” IEEE J. Solid-State Circuits, vol. 44, no. 4, pp. 1067–1077, April 2009.
[28] J. Yoo, L. Yan, D. El-Damak, M. Altaf, A. Shoeb, and A. Chandrakasan,“An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor,” IEEE J. Solid-State Circuits, vol. 48, no. 1, pp. 214–228, Jan 2013
[29] Tzu-Yun Wang, Min-Rui Lai, Christopher M. Twigg, Sheng-Yu Peng, “A Fully Reconfigurable Low-Noise Biopotential Sensing Amplifier With 1.96 Noise Efficiency Factor,” IEEE Tran. Biomed. Circuits and Syst., vol. 8, no. 3, June 2014