本研究利用TSMC 0.35μm Mixed Signal 2P4M Polycide製程，結合乾、濕蝕刻的後製程，設計與製造CMOS-MEMS加速度計。本論文特色為透過提出之後製程製造出對稱薄膜堆疊結構的CMOS-MEMS加速度計(四層金屬與三層介電材料)，且透過結構上金屬引洞材料的設計，使後製程能夠順利進行以完成結構懸浮；此外在結構固定端亦提出電性絕緣的結構設計以解決此後製程遭遇的電性繞線問題。本研究利用對稱結構來提升元件的總體性能，例如提高靈敏度與熱穩定性，及改善現有CMOS-MEMS元件因殘餘應力產生的結構翹曲問題。

This study utilizes TSMC 0.35um Mixed Signal 2P4M Polycide process, combined with proposed post-process to design and fabricate a CMOS-MEMS accelerometer. The merit of this study is that through post-CMOS process with wet, and dry etching to design and fabricate a symmetric layers stacking CMOS-MEMS accelerometer (with 4 metal layers and 3 dielectric layers) by metal via design on structures; Moreover, for the purpose of electrical routing using this post-CMOS process, a structure design at anchors for electrical isolation is proposed. The results show that overall device performances can be enhanced, ex. higher device sensitivity, thermal stability and reduced existent residual stresses in CMOS-MEMS.

[1] http://www.nintendo.tw/
[2] http://www.apple.com/iphone/
[3] J. M. Bustillo, R. T. Howe, and R. S. Muller, “Surface micromachining for microelectromechanical systems,” Proceedings of the IEEE, 86, pp.1552-1574, 1998
[4] R. T. Howe, “Surface micromachining for microsensors and microactuators,” Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 6, pp.1809-1813, 1988.
[5] K. H. L. Chau, S. R. Lewis, Y. Zhao, R. T. Howe, S. F. Bart, and R. G. Marcheselli, “An integrated force-balanced capacitive accelerometer for low g application,” Sensors and Actuator A, 54, pp.472-476, 1966.
[6] G. T. A. Kovacs, N. I. Maluf, and K. E. Petersen, “Bulk micromachining of silicon,” Proceedings of the IEEE, 86, pp.1536-1551, 1998.
[7] C. Burrer, J. Esteve, and E. Lora-Tamayo, “Resonant silicon accelerometers in bulk micromachining technology and approach,” J. Microelectromech. Syst., 5, pp.122-130, 1996.
[8] N. Yazdi, and K. Najafi, “An all-silicon single-wafer micro-g accelerometer with a combined surface and bulk micromachining process,” J. Microelectromech. Syst., 9, pp.544-550, 2000.
[9] F. Rudolf, A. Jornod, J. Bergqvist, and H. Leuthold, “Precision accelerometers with μg resolution,” Sensors and Actuators A, 21, PP.297-302, 1990.
[10] M. Koyanagi, T. Fukushima, and T. Tanaka, “High-density through silicon vias for 3-D LSIs,” Proceedings of the IEEE, 97, pp.49-59, 2009.
[11] K. Sakuma, P. S. Andry, C. K. Tsang, S. L. Wright, B. Dang, C. S. Patel, B. C. Webb, J. Maria, E. J. Sprogis, S. K. Kang , R. J. Polastre, R. R. Horton, and J. U. Knickerbocker, “3D chip-stacking technology with through-silicon vias and low-volue lead-free interconnections,” IBM Journal of Research, 52, pp.611-622, 2008.
[12] S. Spiesshoefer, Z. Rahman, G. Vangara, S. Polamreddy, S. Burkett, and L. Schaper, “Process integration for through-silicon vias,” Journal of Vacuum Science & Technology A, 23, 2005.
[13] H. Baltes, O. Brand, A. Hierlemann, D. Lange, and C. Haleitner, “CMOS-present and future,” IEEE International Conference on Micro Electro Mechanical System, Las Vegas, NV., Jan., 2002, pp. 459-466.
[14] http://www.st.com
[15] http://www.bosch-sensortec.com
[16] http://www.analog.com
[17] J. A. Thorton, and D. W. Hoffman, “Stress related effects in thin films,” Thin Solid Films, 171, pp.5, 1989.
[18] H. Baltes, O. Brand, G. K. Fedder, C. Hierold, J. Korvink, and O. Tabata, CMOS MEMS: Advanced Micro and Nanosystems. Vol. 2, Weinheim, Germany, John Wiley & Sons Inc, 2005.
[19] http://www.akustica.com
[20] G. K. Fedder, “CMOS-based sensors,” IEEE Sensors Conference, Irvine, CA, Oct., 2005, pp. 125-128.
[21] http://www.cic.org.tw
[22] H. Seidel, U. Fritsch, R. Gottinger, and J. Schalk, “A piezoresistive silicon accelerometer with monolithically integrated CMOS circuitry,” International Conference on Solid-state Sensors and Actuators and Eurosensors IX., Stockholm, Sweden, June, 1995.
[23] A. Partridge, A. E. Rice, T. W. Kenny, “New thin film epitaxial polysilicon encapsulation for piezoresistive accelerometers,” MEMS 01’, Interlaken, Switzerland, Jan., 2001.
[24] Y. Nemirovsky, A. Nemirovsky, P. Muralt, and N. Setter, “Design of novel thin-film piezoelectric accelerometer,” Sensors and Actuators A: Physical, 56, pp. 239-249, 1996.
[25] R. de Reus, J. O. Gullov, and P. R. Scheeper, “Fabrication and characterization of a piezoelectric accelerometer,” J. Micromech. Microeng., 9, pp.123-126, 1999.
[26] F. Mailly, A. Martinez, A. Giani, F. Pascal-Delannoy, and A. Boyer, “Design of a micromachined thermal accelerometer: thermal simulation and experimental results,” Microelectronics Journal, 34, pp.275-280, 2003.
[27] A. M. Hung, J. Jones, E. Czyzewska, J. Chen, and B. Woods, “Micromachined accelerometer based on convection heat transfer,” MEMS 98’, Heidelberg, Germany, Jan., 1998.
[28] H. Xie, and G. K. Fedder, “A CMOS z-axis capacitive accelerometer with comb-finger sensing,” MEMS ’00, Miyazaki, Japan, Jan., 2000.
[29] H. Xie, G. K. Fedder, Z. Pan, and W. Frey, “Design and fabrication of an integrated CMOS-MEMS 3-axis accelerometer,” Nanotech, 2, pp.420-423, 2003.
[30] H. Luo, G. Zhang, L. R. Carley, and G. K. Fedder, “A post-CMOS micromachined lateral accelerometer,” J. Microelectromech. Syst., vol.11, pp.188-195, 2002.
[31] H. Lakdawala, and G. K. Fedder, “Temperature stabilization of CMOS capacitive accelerometers, ” J. Micromech. Microeng. 14, pp.559-566, 2004.
[32] H. Xie, L. Erdmann, X. Zhu, K. J. Gabriel, and G. K. Fedder, “Post-CMOS processing for high-aspect-ratio integrated silicon microstructures,” J. Microelectromech. Syst., vol.11, No.2, 2002.
[33] S. S. Tan, C. Y. Liu, L. K. Yeh, Y. H. Chiu, and Klaus Y. J. Hsu, “A new process for CMOS MEMS capacitive sensors with high sensitivity and thermal stability, ” J. Micromech. Microeng. 21, 2011.
[34] J. S. Pulskamp, A. Wickenden, R. Polcawich, B. Piekarski, M. Dubey, and G. Smith, “Mitigation of residual film stress deformation in multilayer microelectromechanical systems cantilever devices,” Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 21, pp.2482-2486, 2003.
[35] Y. J. Huang, T. L. Chang, and H. P. Chou, “Study of symmetric microstructures for CMOS multilayer residual stress,” Sensors and Actuators A: Physical, vol. 150, pp.237-242, 2009.
[36] S. Timoshenko, “Analysis of bi-metal thermostats,” J. Optical Society of America, 11, pp.233-255, 1925.
[37] H. Lakdawala, and G. K. Fedder, “Analysis of temperature dependent residual stress gradients in CMOS micromachined structures,” Transducers 99’, Sendai, June, 1999.
[38] C. Wang, M. H. Tsai, C. M. Sun, and W. Fang, “A novel CMOS out-of-plane accelerometer with fully differential gap-closing capacitance sensing electrodes,” J. Micromech. Microeng., 17, pp.1275-1280, 2007.
[39] M. H. Tsai, C. M. Sun, Y. C. Liu, C. Wang, and W. Fang, “Design and application of a metal wet-etching post-process for the improvement of CMOS-MEMS capacitive sensors,” J. Micromech. Microeng., 19, 2009.
[40] B. V. Amini, and F. Ayazi, “A 2.5-v 14-bit ΣΔ CMOS SOI capacitive accelerometer,” IEEE J. Solid-State Circuits, 38, pp.2467-2476, 2004.
[41] C. Lu, M. Lemkin, and B. E. Boser, “A monolithic surface micromachined accelerometer with digital output,” ISSCC, San Francisco, CA, USA, Feb., 1995, pp.160-161.
[42] B. E. Boser, and R. T. Howe, “Surface micromachined accelerometers,” IEEE J. Solid-State Circuits, 31, pp.366-375, 1996.
[43] N. Yazdi, H Kulah, and K. Najafi, “Precision readout circuits for capacitive microaccelerometers,” Proc. IEEE Conf. Sensors, Vienna, Austria, Oct., 2004, pp.28-31.