此論文分析將調變介電係數降低表面電場應用於高壓鰭式電晶體，此高壓鰭式電晶體採用鰭式電晶體的製程製作。並結合電腦模擬軟體(TCAD)，以鰭式電晶體製程步驟作為參考，建立高壓鰭式電晶體結構，對於元件的電特性、崩潰電壓做進一步的分析與討論。
此論文提出的鰭式電晶體以閘極長度為1.0μm，汲極延伸區為1.0μm。絕緣層寬度為0.033μm、深度0.1μm作為基準。為了取得汲極延伸區離子佈值的最佳劑量，必須在崩潰電壓及導通電阻之間做抉擇，使用調變介電係數降低表面電場於論文中探討。為了達到汲極延伸區離子佈值的最佳劑量，我們可以增加絕緣層的寬度或是提高絕緣層的介電常數。當絕緣層厚度增加至0.132μm，此時最佳離子佈植劑量可以從3.65*1012 cm-2提升至6.9*1012 cm-2。此外，我們亦針對絕緣層深度進行探討。在使用高介電係數(k=86)材料作為絕緣層，此時可以比二維電晶體更高的崩潰電壓，其最高崩潰電壓為31.55V，以及最高的FOM值為3908 V2/mΩ-cm2。

In this thesis, the analysis of dielectric RESURF implemented in high-voltage Si FinFETs has been studied. The high-voltage FinFET structure with a typical FinFET fabrication process flow has been established by using Technology Computer Aided Design (TCAD) simulation, and electrical characteristics including avalanche breakdown can also be obtained.
For the FinFET under study, the gate length is 1.0μm and the length of drain-extended region is 1.0μm. Typical STI width (WSTI) is 0.033μm, and typical STI thickness (TSTI) is 0.1μm. To find the optimized dose for the n-drift region implant for a better tradeoff between breakdown voltage and specific on-resistance, the concept of dielectric RESURF is explored. It is found that a higher optimal dose for n-drift region implant can be achieved by either increasing the width of the STI or by adopting a higher dielectric constant. As the WSTI increased to 0.132μm, the optimal n-drift dose is increased from 3.65*1012 cm-2 to 6.9*1012 cm-2. Furthermore, the effects of depth of STI when it is larger than the junction depth are studied. As the STI is deeper, the optimized dose can be increased, reducing Ron,sp. When a high-k (k=86) dielectric is used, the breakdown voltage reaches 31.55V, higher than that of a 2-D planar FET, and the FOM is 3908 V2/mΩ-cm2.

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