Temperature-Aware Leakage Power Modeling for Integrated Circuits and Its Application to Power-Thermal Co-Simulation

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研究生：	曾群凱 Tseng, Chun-Kai
論文名稱：	Temperature-Aware Leakage Power Modeling for Integrated Circuits and Its Application to Power-Thermal Co-Simulation 具有溫度感知能力之積體電路靜態功率模型建立方法及其在功率與溫度共同模擬上之應用
指導教授：	黃錫瑜 Huang, Shi-Yu
口試委員:
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2010
畢業學年度：	99
語文別：	英文
論文頁數：	41
中文關鍵詞：	靜態功率模型、靜態功率評估、標準原件庫、靜態隨機存取記憶體產生器
外文關鍵詞：	Leakage Power Modeling, Leakage Power Estimation, Standard Cell Library, SRAM Compiler
相關次數：	點閱：3 下載：0
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In this paper, we present an automatic leakage power modeling method for standard cell library as well as SRAM compiler and further use these models to build a power-thermal co-simulation framework. For the modeling problem, there are two major challenges – (1) the high sensitivity of leakage power to the temperature (e.g., the leakage power of an inverter can be different by 19.28X when temperature rises from 25°C to 100°C in 90nm technology), and (2) the large number of models to be built (e.g., there could be 80,835 SRAM macros supported by an SRAM compiler). Our method achieves high accuracy efficiently by two formula-based prediction techniques. First of all, we incorporate a quick segmented exponential interpolation scheme to take into account the effects of the temperature. Secondly, we use a MUX-oriented linear extrapolation scheme, which is so accurate that it allows us to build the leakage power models for all SRAM macros based on linear regression using only the simulation results of 9 small-sized SRAM macros. Experimental results show that this method is not only accurate but also highly efficient. Applying these temperature-aware leakage models into our power-thermal co-simulation framework also reveals that for some in-house design the leakage power could be up to 8.14X different from the one estimated without thermal consideration.

在這篇論文裡面，我們針對標準原件庫(Standard Cell Library)及靜態隨機存取記憶體產生器(SRAM Compiler)提出了一個自動化靜態功率模型建立方法，並且我們應用此模型建立功率與溫度功共同模擬平台。在建立模型的過程中，我們將會面臨兩個主要的挑戰 – (1) 靜態功率對於溫度的高敏感性( e.g., 根據實驗結果，一個在90奈米製程下自行建立的反相器，操作溫度從25°C 上升至100°C，其靜態功率成長19.28倍) 和(2) 模型數量過多 ( e.g., 一個靜態隨機存取記憶體產生器總共可產生 80,835 種不同大小的靜機存取記態記憶體)。我們的方法藉由搭配使用兩種以方程式為基礎的預測技術來同時達到預估的高準確度及執行的高效率，首先我們使用快速的分段指數內插( Segmented Exponential Interpolation)方法考慮溫度對靜態功率的影響，除此之外，我們利用多工器導向的線性外插 ( Mux-oriented Linear Extrapolation)方法建立靜態隨機存取記憶體其高準確度的靜態功率模型，此模型是根據九個小尺寸靜態隨機存取記憶體的模擬結果執行線性迴歸所產生，可對所有靜態隨機存取記憶體產生器所能產生的靜態隨機存取記憶體進行功率評估，根據實驗結果，此方法不僅準確度高且十分有效率。我們實際應用這些具有溫度感知能力的模型到功率與溫度共同模擬平台中，在考慮溫度和靜態功率的交互影響下，一個自行設計的晶片其靜態功率會是在無考慮情況下的8.14倍。

Abstract    i
摘要    ii
Content    iii
List of Figures    v
List of Tables    vii
Chapter 1 Introduction    1
1.1 Introduction    1
1.2 Thesis Organization    5
Chapter 2 Leakage Power Model of A Standard Cell Library    6
2.1 Temperature-Aware Leakage Power Modeling    6
2.2 Temperature-Dependent Characteristic Formula    7
Chapter 3 Leakage Power Model of An SRAM Compiler    10
3.1 Basic Idea    10
3.2 Characteristic Formula for SRAM Compiler    11
3.2.1 Mux-Oriented Power Model    11
3.2.2 Segmented Exponential Model for SRAM Macros    13
3.2.3 Deriving Leakage Power of a Memory Macro    14
Chapter 4 Power-Thermal Co-Simulation    19
4.1 Thermal Characteristics    19
4.2 Compact Thermal Model    20
4.3 Interaction of Leakage Power and Temperature    22
4.4 Power-Thermal Co-Simulation Mechanism    25
Chapter 5 Experimental Results    28
5.1 Modeling Accuracy of Basic Cells    28
5.2 Modeling Accuracy of SRAM Macros    29
5.3 Modeling Time    30
5.4 Temperature-Aware Power Estimation    31
5.5 Power-Thermal Co-Simulation Results    33
Chapter 6 Conclusion    37
Bibliography    38

                                

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