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研究生: 黃震鑠
Chen-Shuo Huang
論文名稱: 複晶矽可電子抹除程式化唯讀記憶體之研究
A Study of Poly-Si EEPROM
指導教授: 葉鳳生
Fen-Shan Yeh
張鼎張
Ting-Chang Chang
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2005
畢業學年度: 93
語文別: 英文
論文頁數: 56
中文關鍵詞: 多晶矽記憶體玻璃基板
外文關鍵詞: Poly-Si, EEPROM, glass
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  • 為了實現系統整合面板,需要玻璃基板記憶體製作技術。我們找到一種可以成功製作於玻璃基板上的記憶體結構 — 簡單多晶矽薄膜電晶體之電子可抹除程式化之唯讀記憶體 (simple twins poly-Si TFTs EEPROM’s)。我們首先實際製作並檢驗此結構記憶體之可行性。我們成功製作出擁有良好特性之玻璃機版記憶體並獲得與先前報導文獻相同的結論 — 越大的耦合電晶體之面積,可以獲得較佳的記憶體效率,此結果證明我們有能力製作玻璃基板記憶體。接下來,我們提出並實現用微小的結構改變來增進此結構的記憶體效率 — 增加耦合電晶體的源極/汲極與閘極的重疊區域可以有效增進記憶體效能。此外,我們也對不同的操作電晶體之源極/汲極參雜形式之影響做了探討,發現N型源極/汲極參雜形式比P型源極/汲極參雜形式可以獲得更好的記憶體效能。


    With the suggestion of SoP to reduce cost and create additional value, the memory which is fabricated on glass substrate is essential for peripheral driver ICs application. We have found and studied a simple twins poly-Si TFTs EEPROM’s to suit the low temperature and simple process on glass substrate. First, we actually fabricated the simple twins poly-Si TFTs EEPROM’s and examined the feasibility of it. We successfully made it and that has good memory characteristic. The memory also exhibited that higher area ratio in coupling cell results in bigger on-current of devices and the better programming/erasing efficiency, the results of experiment were agreed with previous report. And than we present a concept of enhancing this memory cell performance by increasing the overlap of the source/drain and gate in coupling cell and realize it. In addition, the influence of different S/D dopant type in active cell was investigated, the N-type S/D dopant have batter memory efficiency than P-type S/D dopant.

    ABSTRACT(CHINESE) I ABSTRACT(ENGLISH) II ACKNOWLEDGEMENTS III CONTENTS IV TABLE CAPTION VI FIGURE CAPTION VII CHAPTER 1 VII CHAPTER 2 VII CHAPTER 3 VII CHAPTER 1 INTRODUCTION 1 1-1 GENERAL BACKGROUND 1 1-2 CONVENTIONAL FLOATING GATE EEPROM 2 1-3 MOTIVATION 4 CHAPTER 2 THE PRINCIPLE AND EXPERIMENTAL PROCEDURES 11 2-1 THE OPERATION AND PRINCIPLE OF MEMORY 11 2-2 EXPERIMENTAL PROCEDURES 14 CHAPTER 3 RESULTS AND DISCUSSIONS 24 3-1 MEMORY CHARACTERISTICS OF POLY-SI EEPROM 24 3-2 RELIABILITY 27 3-3 THE INFLUENCE OF OVERLAP OF FLOATING GATE AND S/D IN T2 30 3-4 THE INFLUENCE OF DIFFERENT S/D DOPANT TYPE IN T1 CELL 33 CHAPTER 4 CONCLUSION 51 REFERENCE 53

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