本論文提出準確的迪克森電荷泵(Dickson Charge Pump)動態分析，了解迪克森電荷泵在不同工作週期(Duty Cycle)下對其輸出電壓以及漣波影響，並在電路設計上實現一個具自動控制工作週期的迪克森電荷泵，使輸出電壓值為最大以及達到漣波減小之效果。本設計相較於工作週期固定為50%的迪克森電荷泵，有更佳的輸出電壓。
為使本研究晶片可廣泛使用，電路設計中包含可外調式電阻來控制驅動頻率，達到在輸入電壓1.8V、負載電容20pF及負載電流範圍為0A~50μA的條件下，輸出電壓為5V之規格。
本論文之電路設計以TSMC 0.18μm CMOS製程實現，晶片總面積為1020×915μm2，量測結果使迪克森電荷泵達到最大輸出電壓以及減小漣波。

This thesis presents an accurate dynamic analysis of Dickson Charge Pump that helps to realize how duty cycle affects the values of output voltage and voltage ripple. A Dickson Charge Pump with an automatic duty cycle control is also proposed. The designed circuit not only reaches the maximum output voltage under specific clock frequency but also decreases ripple by tuning the duty cycle. Therefore, its output voltage is more optimized than that of the conventional Dickson Charge Pump with 50% duty cycle.
In order to meet a wide range of application conditions, an external variable resistor is used to grossly adjust the clock frequency before the tuning of duty cycle sets in. For the circuit demonstrated in this thesis, the input voltage is 1.8V and an output voltage of 5V is obtained when the loading capacitance is 20pF and the loading current ranges from 0A to 50μA
The designed Dickson Charge Pump circuit was implemented in TSMC 0.18μm CMOS process, and its size is 1020×915μm2. The result of measurement shows that the dynamic control of duty cycle makes the circuit reach a maximum output voltage and the voltage ripple is smaller than that of-the fixed 50% duty cycle case.

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