本篇論文以4H-碳化矽的n型基板及p型磊晶層製作出橫向金氧半場效應電晶體，為了避免熱氧化的二氧化矽與碳化矽表面有碳沉積，使界面捕捉電荷密度提高，遷移率被限制住，利用原子氣相沉積氧化鋁材料做為閘極絕緣層，透過電流-電壓分析其特性，可得到最大約130 cm2/Vs的遷移率，也製作出利用p型矽基板沉積氧化鋁的金氧半電容結構，並且對氧化鋁做不同溫度的氧氣熱退火製程，透過電流-電壓及電容-電壓量測觀察出最400~500℃為最佳熱退火溫度。
　　由於寬能隙半導體適合做為高功率元件，本篇論文也以4H-碳化矽n型基板及n型磊晶層製作出垂直型蕭基二極體，藉由模擬決定以溝渠填入氮化矽的方式製作出蕭基二極體並著手進行相同結構的製程，透過實際元件的電流-電壓及電容-電壓量測，可得到理想因子約1.08~1.2，導通電阻約為2.5 mΩ*cm2，最佳崩潰電壓約940 V，並將量測結果與模擬進行比較分析。

4H-SiC lateral NMOSFETs on p--type epitaxial layer were fabricated and studied. In order to avoid high interface states (Dit) caused by carbon cluster near the SiO2/4H-SiC interface and to enhance Field- Effect Mobility (μFE), we choose Atomic-Layer-Deposition (ALD) Al2O3 to be the critical gate insulator. The measured maximum μFE is about 130 cm2/Vs by analyzing I-V characteristics. We also fabricated MIS capacitor with Al2O3 as the insulator on p-type silicon substrate, and investigated the improvement of Al2O3 quality by annealing in oxygen with different temperature. C-V and I-V measurements indicated the best annealing temperature is between 400~500℃.
Wide band gap materials with high breakdown electric field are needed for high-power semiconductor devices. 4H-SiC vertical Schottky Barrier Diode (SBD) on n--type epitaxial layer were also studied and fabricated in this thesis. The structure of the device is Trench-Field Plate SBD (TFPSBD) that we designed with simulation tools. The measured ideal factor is 1.08~1.2, The Ron,sp of 50 μm diameter diode is 2.5 mΩ*cm2, and the best breakdown voltage is 940 V.

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