本研究由實驗室所設計的117-kHz CMOS-MEMS共振器為基礎設計一類比式鎖相迴路結合至CMOS-MEMS晶片，能對CMOS-MEMS共振器達到鎖定的要求，進而將鎖相迴路當作相位補償達成一CMOS-MEMS震盪器。同時本研究也以正回授MEMS震盪電路與鎖相迴路驅動的MEMS震盪電路做一比較，發現此次設計的鎖相迴路搭配至MEMS震盪電路除了較高60Hz電源部分調變的突刺訊號(Spurious signal)，在相位雜訊上無明顯差別。不過使用鎖相迴路的MEMS震盪器相較正回授MEMS震盪器擁有很穩定的震幅，以及奇快的啟動速度(鎖定速度)。

此次以傳統類比式鎖相迴路設計，將共振器驅動在共振頻率上，能對共振器達到鎖定的要求。相較現在數位式或全數位式的鎖相迴路，可利用傳統類比式鎖相迴路對於直流偏移造成的穩態相位誤差(工作點偏移)作矯正，將可以簡單的調整輸入與輸出訊號的相位差(約±10度)，找到精確的共振頻率位置。

最終將正回授與鎖相迴路結合在迴路裡達成複合式的震盪器，使整理性能可依比例調整達成快速鎖定(起震)、共振頻率穩定、震幅穩定、訊號乾淨的震盪器。

In this research, we design a linear phase-locked loop in the driving circuit based on 117-kHz CMOS-MEMS resonator. The PLL circuit provides phase compensation in the CMOS-MEMS oscillator circuit. At the same time, this study also compares with the MEMS oscillator using the conventional phase compensation method. It is found that the phase noise in both approaches are similar. However, the PLL-based MEMS oscillator has a very stable oscillating amplitude, and faster speed to lock on the resonance frequency.

We design a traditional linear phase-locked loop (PLL) circuit in the driving loop of a MEMS Oscillator. Compared to digital type or all-digital type PLL circuits, we can use DC offset caused the static phase error (operating point offset) to correct in traditional linear phase locked loop, and adjust the phase difference of input and output signals (about ±10 degrees) to find the exact location of the resonance frequency.

Finally, we combine positive feedback and the phase-locked loop circuit to realize a hybrid MEMS oscillator. The overall performance can be adjusted by the proportions of injected signals so as to achieve an oscillator with a fast lock-in time and a stable oscillating frequency.

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