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研究生: 王皓正
Hao-Cheng Wang
論文名稱: 實作與最佳化AVS解碼器於雙核心平台
Implementation and Optimization of AVS Decoder on Dual Core Soc Platform
指導教授: 石維寬
Wei-Kuan Shih
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 56
中文關鍵詞: AVSdual-corePACDSPPSDK
外文關鍵詞: AVS, dual-core, PACDSP, PSDK
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  •   在現今的時代,多媒體功能已經與我們的生活密不可分了。不論是有線或無線的裝置,都會去強調擁有多媒體的功能。而在行動裝置上播放影像這個部份,也愈來愈受到重視。一般來說,考量到成本問題,行動裝置不會選擇最高級的硬體,因此,實際執行效能在行動裝置的實作上,是需考慮的重點部份。且由於受限於行動裝置的體積小和重量輕,並沒有辦法於行動裝置上放入很大的電池,所以低耗電也將是行動裝置實作的另一個重點。

      這篇論文的目的是在討論在雙核心的平台上實作並最佳化AVS解碼器的方法和過程。採用雙核心的好處在於,將實際應用分工後,分別交給MPU及DSP來處理,其中MPU用來處理一些控制或Multi-tasking的工作,而DSP則負責處理一些運算量大的程序。正因為MPU及DSP的分工,使得不需要用高階的處理器,也能處理運算量很大的多媒體應用。在本篇論文的實作上,雙核心平台採用工研院開發的PSDK發展板,MPU的部份使用的為ARM920T,DSP則為工研院自行發展的PACDSP 3.0。影像解壓縮的部份,選擇AVS的原因主要是,目前AVS已經成為大陸音視頻編碼技術的國家標準,且AVS有著高壓縮率壓縮品質以及低權利金等優勢。

      本篇論文實作的最佳化過程,主要會針對執行時間以及程式大小這二個方向來努力,其中又以執行時間為重點。就整個系統來看,一個較大的程式如何在雙核心的平台上,將各程序妥善分配在MPU及DSP中,使得整體效能為最佳,是很重要的。除了將程序妥善分配在MPU及DSP外,實作上也會針對各程序演算法本身的最佳化、PACDSP裡兩個cluster處理資料的分工以及組合語言細部的最佳化作深入的探討。


    In an era of now, the function of the multimedia has already been closely related to our life. No matter the wired or wireless device, will all go to put emphasis on having multimedia capabilities. Playing video on the mobile device, also receives increasingly takes. Generally speaking, consider cost issue, we do not choose the high-level processor for mobile device. Therefore, the executing performance is the point part which needs to be considered in mobile device. Because limited to that the mobile device is small and light, and has no idea to put very big battery on it, low power consumption is action another focal point to implement mobile device.

    The purpose of this thesis is discussing the implementation and optimization of AVS decoder on dual-core Soc platform. Adopting dual-core advantages, MPU is used for dealing with control or Multi-tasking procedure, and DSP is used for procedure with complex operations. Just because the division of labour between MPU and DSP, we can deal with multimedia application which contains a lot of operations without using high-level processor. In the implementation of this thesis, the dual-core platform adopts PSDK which use ARM920T as MPU and PACDSP 3.0 as DSP. The reason for choosing AVS as video decoder is mainly, AVS has already become the mainland China national video coding standard and AVS has high compressing rate, high video quality and low royalty, etc...

    The optimization in this thesis will come hard to execution time and code size, among them take execution time as the focal point again. It is very important to assign procedure properly between MPU and DSP and making whole system efficiency best. Besides procedure properly between MPU and DSP, the implementation also aims at optimizing algorithm of various procedures, PACDSP two clusters data partition and the assembly language detail optimization makes the thorough discussion in this thesis.

    Chapter 1 Introduction 1 1.1. Background 1 1.1.1. AVS 1 1.1.2. AVS vs. H.264 1 1.1.3. Dual Core 2 1.2. Motivation 2 Chapter 2 AVS, System and PACDSP overview 4 2.1. AVS 4 2.1.1. AVS basic definition 4 2.1.2. AVS Codec 5 2.1.2.1. AVS Encoder 5 2.1.2.2. AVS decoder 5 2.1.3. AVS major tools 6 2.1.3.1. Entropy 6 2.1.3.2. Inverse Transformation 6 2.1.3.3. Intra Prediction 6 2.1.3.4. Inter Prediction 7 2.1.3.5. De-blocking filter 7 2.2. Dual Core System Architecture 8 2.3. PACDSP 8 Chapter 3 Dual Core Partition 12 Chapter 4 DSP Algorithm Optimization 13 4.1. Inverse Transformation 13 4.1.1. Inverse Transformation Algorithm 13 4.1.2. Inverse Transformation Implementation 14 4.2. Intra Prediction 18 4.2.1. Intra Prediction Algorithm 18 4.2.2. Intra Prediction Algorithm Implementation 21 4.3. Inter Prediction 25 4.3.1. Inter Prediction Algorithm 25 4.3.2. Inter Prediction Implementation 27 4.4. De-blocking Filter 35 4.4.1. De-blocking Filter Algorithm 35 4.4.2. De-blocking Filter Implementation 40 Chapter 5 Experiment environment and Statistic analysis 45 5.1. Experiment environment 45 5.2. Statistic analysis 45 5.2.1. OpenAVS on MPU 46 5.2.2. Dual Core Optimization 47 5.2.3. AVS Assembly Code vs. H.264 Assembly Code (baseline profile) 49 5.2.3.1. Algorithm Complexity Inverse Transformation 50 5.2.3.2. Algorithm Complexity Intra Prediction 50 5.2.3.3. Algorithm Complexity Inter Prediction 51 5.2.3.4. Algorithm Complexity De-blocking filter 52 Chapter 6 Conclusions 54 Chapter 7 Future Work 55 Chapter 8 Reference 56

    【1】Advanced coding of audio and video-Part 2:Video , 2006-03-01
    【2】2004 IEEE International Conference on Multimedia and Expo (ICME), ”Overview of AVS Video Standard” Liang Fan', Siwei Ma2, Feng Wu3 ,1) Dept. Elec. & Comm. Engineering, Sun Yut-sen University, Guungzhoir 2) Institute of Computing Technology, Chinese Academy of Sciences, Beijing 3) Microsoft Research Asia, Beijing
    【3】“AVS - The Chinese Next-Generation Video Coding Standard ” , Wen Gao, Cliff Reader, Feng Wu, Yun He, Lu Yu, Hanqing Lu, Shiqiang Yang, Tiejun Huang, Xingde Pan
    【4】“Systematic Approach of Fixed Point 8x8 IDCT and DCT Design and Implementation1”, Ci-Xun Zhang, Jing Wang, Lu Yu Institute of Information and Communication Engineering, Zhejiang University, Hangzhou, China
    【5】Overview of AVS Video Standard Liang Fan', Siwei Ma2, Feng Wu3 1) Dept. Elec. & Comm. Engineering, Sun Yut-sen University, Guungzhoir 510275, PRC 2) Institute ofComputing Technology, Chinese Acudemy of Sciences, Beijing 3) Microsoft Research Asia, Beijing
    【6】Jia-Ming Chen, Hsin-Wen Wei, Shau-Yin Tseng, Jenq-Kuen Lee and Wei-Kuan Shih, “An Experience on the Programming for the PACDSP, a VLIW DSP Processor” Conference on VLSI Design/CAD August 09-12 2005 Taiwan
    【7】“Full 16-bit implementation of ¼ pel motion compensation” Joint Video Team (JVT) of ISO/IEC MPEG & ITU-T VCEG 3rd Meeting: Fairfax, Virginia, USA, 6-10 May,2002
    【8】“Low Complexity Transform and Quantization – Part I: Basic Implementation” Joint Video Team (JVT) of ISO/IEC MPEG & ITU-T VCEG 2nd Meeting: Geneva, CH, Jan. 29 - Feb. 1, 2002
    【9】“Low Complexity Transform and Quantization – Part II: Extensions” Joint Video Team (JVT) of ISO/IEC MPEG & ITU-T VCEG 2nd Meeting: Geneva, CH, Jan. 29 - Feb. 1, 2002
    【10】ThomasWiegand, Gary J. Sullivan,Ajay Luthra,Gisle Bjøntegaard “Overview of the H.264 / AVC Video Coding Standard”

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