現今電子構裝技術發展迅速，為了達到輕、薄、短、小及高傳輸速度、I/O接腳數多等需求，覆晶球柵陣列(flip-chip ball grid array, FC-BGA)構裝因應而生。而此一技術，在構裝製程以及可靠度評估中仍會出現許多問題，例如構裝在製程完畢後之翹曲行為，及其銲錫凸塊在歷經加速熱循環後產生的低週期熱疲勞破壞現象等，皆值得吾人深入探究。
本論文首先利用有限單元分析軟體ANSYS®建立一精確之三維有限單元分析模型，配合失效/再生單元模擬技術以及有限單元全域/局部分析方法，針對內含銅/低介電材料層(Cu/Low-k)晶片之覆晶球柵陣列構裝於構裝製程後之熱機械行為進行模擬分析，包含晶片、銲錫凸塊、與不同材料介面間之應變與應力及整體構裝之翹曲變形等，並利用自動顯像檢測系統(robotic vision systems inspection, RVSI)實驗及太曼-格林干涉儀(Twyman-Green interferometry)實驗驗證其正確性。本論文接著亦探討一覆晶球柵陣列構裝於加速熱循環(accelerated thermal cycling )測試下，不同材料組成銲錫凸塊之彈性、塑性及潛變行為，並進而預估其疲勞壽命。最後，對於相關製程、材料及幾何參數等，於上述構裝熱機械行為影響，本論文亦進行了參數化分析。
本論文獲得之成果，不但有助於內含Cu/Low-k晶片之覆晶球柵陣列構裝於構裝製程後之熱機械行為及加速熱循環測試下可靠度之瞭解，藉由參數分析，並可提供構裝業者進行構裝設計之參考。

Nowadays, electronic packages are developed very fast, therefore the flip-chip ball grid array package is devised for the purpose of achieving the requirements for something which is light, thin, short, small, high speed and high input/output pin counts. However the flip-chip ball grid array package, as a new technology, still has many technical challenges remaining in concern, such as the warpage behavior after the packaging process, and the low cycling thermal fatigue failure which is produced by the solder bump after the accelerated thermal cycling test. These features of the flip-chip ball grid array package in this research work worth further study.
Using the element death and birth technology and the finite element global/local analysis model, this study is first to establish an accurate three-dimensional finite element thermal-mechanical analysis model by the ANSYS finite element analysis software.Continuously,the integrated process-dependent analysis simulates for the thermal-mechanical properties which are produced from the chip with Cu/low-k layer of flip- chip ball grid array package after packaging process, including the warpage of the packaging and the strain/stress of the chip, solder bump and the different interfaces of surrounding materials. The validity of the thermal-mechanical analysis model is verified by robotic vision systems inspection (RVSI) and the Twyman-Green interferometry experiments for warpage measurement. In addition, this research explores the elasticity, plasticity and creep behaviors of the solder bump made by different materials, and predicts the fatigue life further when the flip-chip ball grid array package stays in the condition of the accelerated thermal cycling test. At last, this study investigates the effects of related process, materials and geometric parameters on the thermal-mechanical behaviors of this packaging through parametric analysis.
The achievement of this study can help us to understand the thermal-mechanical behaviors of the chip with Cu/low-k layer of flip-chip ball grid array package and the reliability under the accelerated thermal cycling test, also offer an initial design stage for electronic packaging industry.

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