在本論文中，探討在充滿高純度的氧氣環境之下，以熱蒸鍍反應技術沉積 ，實現在二氧化矽為閘極介電層上的二氧化錫，以及三氧化二銦兩個薄膜電晶體。不同於先前其他的研究，我們在材料以未摻雜的條件之下，直接製作出p型導電的薄膜電晶體。在沉積二氧化錫薄膜後，藉由回火的溫度促使二氧化錫轉變為p型通道的薄膜電晶體。打開與關閉的電流開關比約為10^3，而場效電洞遷移率為0.011 cm^2/Vs。藉由兩個不同臨界電壓的薄膜電晶體，組合成一個反向器，而此反向器的輸出電壓增益達到2.8。p型通道的二氧化錫薄膜電晶體的出現，產生另一種軟性電子的應用的視野。在接近室溫的環境之下，製作5到20nm不同通道厚度的三氧化二銦薄膜。使用原子力顯微鏡觀察分析，得到以上不同的薄膜厚度建立了很濃密結晶分布，而其平均方均根的粗糙度介於0.6-0.8nm。其主要是以多晶的晶行方向排列，而方向是以(222)的排列方向為主。主動層的通道薄膜厚度是主要影響通道的電子遷移率以及電阻率的重要參數。根據這兩個二氧化錫以及三氧化二銦的薄膜電晶體，將此各一p型以及n型薄膜電晶體組合成為一反向器，得到輸出電壓增益為11。

In this thesis, the indium oxide (In2O3) and the tin oxide (SnO2) thin film transistors were fabricated on the SiO2 gate dielectric by using reactive thermal evaporation process in the present of high purity oxygen. Different from the previous reports, the fabricated TFTs exhibit p-type conductivity in its undoped form. After depositing the SnO2 film, annealing temperature was turn to achieve p-channel TFTs. The on/off ratio and the field-effect mobility were ~ 10^3 and 0.011 cm^2 / V s, respectively. The inverter was consisted of two different threshold voltages and an output gain of 2.8 was achieved. Appearance of the p-channel SnO2 TFT adds another dimension to its application in transparent electronics. In2O3 thin films of varying thickness of 5 - 20 nm were fabricated the near room temperature. All the films were exhibited dense grain distribution with a root-mean-square roughness in the range 0.6 - 8.0 nm by using atomic force microscopy. The crystallizations of the films were polycrystalline in nature with preferred (222) orientation. The channel mobility and resistively were found to be a strong function of the thickness of the active layer. Integration of the SnO2 TFT and the In2O3 TFT resulted in complementary inverter with a gain of 11.

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