隨著可攜式電子產品的快速發展，為了有效地使用分配有限的電池能量，電源管理系統著實扮演著重要的角色，同時，開發低功耗的電路來延長電池壽命己然成為今日主要的研究課題。對於系統化（SoC）的電源管理晶片來說，必須能夠提供後端每一個子電路所需要的不同電壓及負載電流，低壓降線性穩壓器基於其架構簡單、低雜訊且快速反應時間的優點，成為非常重要而且廣泛應用的單元。

傳統低壓降線性穩壓器利用外部電容串聯寄生電阻補償，然而增益及主極點位置隨負載變動，使得寄生電阻補償方式更顯得複雜。其次，數微米（μm）等級的外部電容佔據電路大量的面積，無法實際整合於晶片裡面，因此，研究發展一個無電容式的低壓降穩壓器將有助於達到完全SoC電源管理的目的。

本研究提出利用電流式回授補償法設計出無需外部電容的低壓降線性穩壓器，將其應用於低功率感測晶片上，在1.2V至3.3V的操作電壓下，欲提供1V的穩定電壓，最大輸出電流50mA，並採用TSMC 0.35μm 2P4M CMOS製程實現。

With the rapid development of portable electronic products, the development of low-power circuit to extend battery lifetime has become a major issue today. At the same time, in order to effectively use the limited battery energy distribution, power management system definitely plays a vital role. For system-on-chip（SoC）power management IC, it must be able to provide back-end needed for each sub-circuit of different voltage and load current. Low dropout linear regulator, based on its advantage of simple structure, low noise, and fast response time, becomes a very important and widely used unit.

Conventional low dropout linear regulators use certain compensation that is with an external capacitor connecting a parasitic resistor in series. However, the gain and dominant pole location will change with the loading so this technique is manifestly complicated for compensation. Secondly, a capacitor of a few □F occupies large circuit area so that it can not be physically integrated on the chip. Researching a capacitor-free LDO, therefore, will help the purpose of implementing fully SoC power management.

This study proposes the employment of a current feedback compensation design to eliminate the need of external capacitors for low dropout linear voltage regulators. And the design will be applied for low-power sensor interface ICs with 1.2V to 3.3V supply voltage. The regulator provides an output voltage of 1V as well as a maximum output current of 50mA. Finally, the circuit is implemented in TSMC 0.35μm 2P4M CMOS process.

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