隨著電子商務的日漸普及，傳統的商業行為已經可以透網路在線上完成交易。基於安全性與可攜性的優點，IC卡非常適合成為電子商務中的認證工具。因此，未來每一台電腦很可能都會需要一台IC卡讀取裝置。
但是一台額外的讀取裝置將會佔據使用者的桌面空間，我們若能將IC卡讀取裝置和其他的電腦周邊裝置整合在一起，就能夠改進這項缺點。由於PS/2鍵盤是目前最普及的電腦周邊裝置，相信整合PS/2鍵盤的IC卡讀取裝置將會被廣泛採用。

因此，我們設計了一個整合『IC卡讀取晶片』和『電腦鍵盤編碼器』的硬體架構。它不但能處理個人電腦和IC卡之間的通訊，也具有鍵盤按鍵的編碼功能。這個設計遵循標準的PS/2電腦鍵盤規格，以及PC/SC Workgroup所制定的IC卡介面裝置規格。因此它能和相容於PC/SC Specifications 1.0的IC卡溝通。

我們利用Compass cell library，以及台積電的0.6μm SPTM CMOS製程來實作這個晶片。晶片面積為4.2×4.2 mm2，最快工作頻率達40 MHz，但為了配合IC卡本身的速度限制，標準的工作頻率定為4 MHz。此外，我們也在晶片中加入了測試用的電路設計 (DFT)。

We design a chip that integrates an IC card reader controller with a PC keyboard encoder. The chip can handle both the communications between IC card and PC and the encoding of keyboard. It complies with both the standard PS/2 PC keyboard specification and the IC card Interface Device (IFD) specification defined by the PC/SC Workgroup. This chip can equip a PC with IC card reading capability at almost no extra cost. We implemented it using a Compass cell library targeted at a 0.6 mm TSMC SPTM CMOS process. The die size is 4.2x4.2 mm2. The chip can run at 40MHz. Design for Testability (DFT) is included.

[1] "Smart Card Handbook", W. Rankl & W. Effing, John Wiley & Sons, Inc.,1997
[2] "PC/SC Specifications 1.0", PC/SC Workgroup, 1997
[3] "Win95 Keyboard Encoder With Japanese-HT6547E", Holtek Semiconductor Inc., 1997.
[4] "ISO/IEC 7816-3 Identification cards-integrated circuit(s) cards with contacts-Part3: Electronic signals and transmission protocols", ISO & IEC, 1997.
[5] "Test Compiler Reference Manual Version 1998.02", Synopsys, 1998.
[6] "HDL Compiler for Verilog Reference Manual Version 1998.02", Synopsys, 1998.
[7] "Silicon Ensemble Reference Manual Version 5.0", Cadence, 1997.
[8] "Dracula Reference Manual Version 4.5.1", Cadence, 1997.
[9] "Verilog-XL Reference Manual Version 2.5", Cadence, 1997.
[10] "Timemill Reference Manual Release 3.4", EPIC, 1996.