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研究生： 邱福千
Chiu, Fu-Chien
論文名稱： 高介電常數薄膜應用於金氧半電容器與金氧半電晶體閘極氧化層之電性研究
The Electrical Characteristics of Metal-Oxide-Semiconductor Capacitors and Metal-Oxide-Semiconductor Field Effect Transistors Using High-Dielectric-Constant Thin Film as Gate Dielectric
指導教授： 李雅明
Joseph Ya-min Lee
黃惠良
Huey-Liang Hwang
口試委員:
學位類別： 博士
Doctor
系所名稱： 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年： 2005
畢業學年度： 93
語文別： 英文
論文頁數： 96
中文關鍵詞： 高介電常數薄膜 、電流傳導機制 、能障高度 、能帶圖 、閘二極體 、介面缺陷的捕獲橫截面積
外文關鍵詞： high-dielectric-constant, current conduction mechanism, barrier height, energy band diagram, gated-diode, interface state capture cross-section
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    • 互補式金氧半電晶體的閘極長度與氧化層厚度持續地縮小可以提高電路的效能與密度，但卻會使得閘極漏電流、靜態功率消耗與閘氧化層可靠度的問題惡化。進入奈米級技術世代，高介電常數材料可以用來取代二氧化矽作為金氧半電晶體的閘氧化層以解決上述的問題。本論文研究使用高介電常數薄膜氧化鋯(ZrO2)、氧化鉿(HfO2)與氧化鑭(La2O3)來製作金氧半電容器與金氧半電晶體；除了詳細研究氧化鋯、氧化鉿與氧化鑭的物理特性外，同時也研究以高介電常數薄膜製作的金氧半電容器與金氧半電晶體之電氣特性。
    高溫時氧化鋯金氧半電容器的電流傳導機制分別是低電場下的普爾-法蘭克(Poole-Frenkel)發射、中電場下的修正型蕭基(Schottky)發射與高電場下的蕭基發射；經由這些電流傳導機制可以得到鋁與氧化鋯的位能障高度為 0.92 eV、氧化鋯裡的缺陷能障高度為 1.1 eV、電子的遷移率約為 12-13 cm2/V-s 與電子的平均自由路徑在 16.2 nm 與 17.4 nm 之間。氧化鉿金氧半電容器的電流傳導機制在高溫下為蕭基發射，則鋁與氧化鉿的位能障高度為 1.02 eV 且氧化鉿複合介面層與矽的等效位能障高度為 0.94 eV。由這些結果我們建立了關於氧化鋯與氧化鉿的金屬/氧化物/介面層/矽之能帶圖。而在氧化鑭金氧半電容器的傳導機制為空間電荷限制電流，由實驗與理論的推導，得出溫度的活化能、氧化鑭裡的電子遷移率、缺陷密度、介電鬆弛時間與在傳導帶的狀態密度等參數。
    在本論文中亦探討氧化鉿金氧半電晶體的各種電氣特性；如IDS-VGS, IDS-VDS 與閘二極體(gated-diode)。利用閘二極體與次臨限擺幅(subthreshold swing)之量測來研究氧化鉿薄膜與矽的介面特性，得出元件的介面產生電流(Igen)、介面缺陷電荷密度(Nit)、載子表面復合速率(so)、少數載子之壽命週期(tFIJ)以及介面缺陷有效的捕獲橫截面積(ss)。

    The aggressive scaling of gate length and gate oxide thickness in CMOS transistors for high performance and circuit density aggravates the problems of gate leakage current, standby power consumption and gate oxide reliability. High-dielectric-constant films can potentially be used to replace SiO2 as gate dielectrics at sub-100 nm technology nodes. In this thesis, MOS capacitors and MOSFETs incorporating ZrO2, HfO2 or La2O3 were fabricated and investigated.
    The conduction mechanisms of these high-k films are studied. The dominant conduction mechanisms of the Al/ZrO2/p-Si structure at high temperatures are Poole-Frenkel emission, modified Schottky emission and Schottky emission in low, medium and high electric fields, respectively. The Al/ZrO2 barrier height, the trap level, the electronic mobility, and the mean-free-path are determined to be 0.92 eV, 1.1 eV, 12-13 cm2/V-s, and 16.2-17.4 nm, respectively. The conduction mechanism of the Al/HfO2/p-Si structure is Schottky emission at high temperatures (513~578 K). The Al/HfO2 barrier height is about 1.02 eV and the effective barrier height between the composite HfO2/interfacial layer (IL) and Si is about 0.94 eV. The metal/oxide/IL/Si energy band diagrams associated with ZrO2 and HfO2 are proposed. The dominant conduction mechanism of the Al/La2O3/p-Si MOS capacitors is space-charge-limited current from 300 K to 465 K. The activation energy, electronic mobility in La2O3, trap density, dielectric relaxation time and density of states in the conduction band were obtained.
    The electrical properties of the HfO2/Si interface were also studied by using the gated-diode method. The generation current Igen, interface-trapped charge density Nit, surface recombination velocity so, minority carrier lifetime in the field-induced depletion region tFIJ, and effective capture cross section ss of the HfO2 gated diode were obtained.

    Abstract Chapter 1 Introduction 1.1 Overview–The device scaling trend 1.2 The application of high dielectric constant thin films 1.2.1 MOSFET gate dielectric applications 1.2.2 Memory applications 1.3 Outline of the thesis Chapter 2 High-k materials properties and considerations 2.1 Permittivity and band gap offset related to device characteristics 2.2 Considerations of thermal stability, film morphology and interface quality 2.3 Process and gate compatibility and mobility enhancement 2.4 Dielectric breakdown and Reliability Chapter 3 Fabrication processes of high-k dielectrics 3.1 Deposition methods and annealing conditions 3.2 Paper research related to ZrO2, HfO2 and La2O3 3.3 Device fabrication 3.3.1 MOS capacitors with high-k dielectrics 3.3.2 MOSFET with HfO2 gate dielectric 3.4 Structural characteristics associated with ZrO2, HfO2 and La2O3 Chapter 4 Current conduction mechanisms in high-k dielectrics 4.1 Leakage current mechanisms in metal/ZrO2/Si structure 4.1.1 C-V characteristics of metal/ZrO2/Si structure 4.1.2 Current mechanisms and energy band diagram related to ZrO2 4.2 Leakage current mechanisms in metal/HfO2/Si structure 4.2.1 C-V characteristics of metal/HfO2/Si structure 4.2.2 Current mechanisms and energy band diagram related to HfO2 4.3 Leakage current mechanisms in metal/La2O3/Si structure 4.3.1 C-V characteristics of metal/La2O3/Si structure 4.3.2 Current mechanisms and energy band diagram related to La2O3 Chapter 5 Electrical Properties of MOSFETs using HfO2 as the gate dielectric 5.1 IDS-VDS and IDS-VGS characteristics with HfO2 gate dielectric 5.2 MOS gated diode characterization 5.3 Evaluation of capture cross sections at the HfO2/Si interface Chapter 6 Conclusions and Future Studies References Tables and Figures Vita Publications

    References
    1. International Technology Roadmap for Semiconductors Home Page, http://public.itrs.net
    2. S. Thompson et al., Intel Technology Journal, 3rd quarter 1998.
    3. L. Chang, S. Tang, T.-J King, J. Bokor and C. Hu, Tech. Dig. – Int. Electron Devices Meet. 2000, 719.
    4. N. Yang, W. K. Henson and J. J. Wortman, Tech. Dig. – Int. Electron Devices Meet. 1999, 453.
    5. S.-H. Lo, D. A. Buchanan, Y. Taur and W. Wang, IEEE Electron Device Lett. 18, 209, (1997).
    6. G. Timp et al., Tech. Dig. – Int. Electron Devices Meet. 1997, 930.
    7. J. H. Stathis and D. J. DiMaria, Tech. Dig. – Int. Electron Devices Meet. 1998, 167.
    8. G.D. Wilk, R.M. Wallace, and J.M. Anthony, J. Appl. Phys. 89, 5243 (2001), and references therein.
    9. W. J. Qi, R. Nieh, B. H. Lee, L. Kang, Y. Jeon, K. Onishi, T. Ngai, S. Banerjee, and J. C. Lee, Tech. Dig. – Int. Electron Devices Meet. 1999, 145.
    10. J. E. Jaffe, C. L. Liu, M. Stoker, R. I. Hegde, R. S. Rai and P. J. Tobin, Appl. Phys. Lett. 80, 1897 (2002).
    11. S.J. Lee, H.F. Luan, C.H. Lee, T.S. Jeon, W.P. Bai, Y. Senzaki, D. Roberts and D.L. Kwong, Symposium on VLSI Technology, 2001, 133.
    12. R. Choi, C.S. Kang, B.H. Lee, K. Onishi, R. Nieh, S. Gopalan, E. Dharmarajan and J. C. Lee., Symposium on VLSI Technology, 2001, 15.
    13. H. Iwai, S. Ohmi, S. Akama, A. Kikuchi, I. Kashiwagi, J. Jaguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. Kuriyama and Y. Yoshihara, Tech. Dig. – Int. Electron Devices Meet. 2002, 625.
    14. S. M. Sze, Physics of semiconductor device, 2nd ed., Wiley, New York, 1981, p380, 403, 852.
    15. J. Robertson, Mater. Research. Soc. 27, 217 (2002).
    16. J. McPherson, J. Kim, A. Shanware, H. Mogul and J. Rodriguesz, Tech. Dig. – Int. Electron Devices Meet. 2002, 633.
    17. H.-S. P. Wong, “Beyond the conventional transistor,” in IBM J. Res. & Dev. Vol. 46, No. 2/3 March/May, 2002, pp. 133-168.
    18. John Robertson, J. Vac. Sci. Technol. B 18, 1785 (2000).
    19. A. Chin, Y. H. Wu, S. B. Chen, C. C. Liao and W. J. Chen, Symposium on VLSI Technology, 2000, 16.
    20. C. S. Kang, H.-J. Cho, K. Onishi, R. Nieh, S. Goplan, S. Krishnan and J. C. Lee, Symposium on VLSI Technology, 2002, 146.
    21. B. H. Lee, L. Kang, W. J. Qi, R. Nieh, Y. Jeon, K. Onishi and J. C. Lee, Tech. Dig. – Int. Electron Devices Meet. 1999, 133.
    22. K. J. Hubbard and D. G. Schlom, J. Mater. Res. 11, 2757 (1996).
    23. A. Chatterjee, R.A. Chapman, K. Joyner, M. Otobe, S. Hattangady, M. Bevan, G.A. Brown, H. Yang, Q. He, D. Rogers, S.J. Fang, R. Kraft, A.L.P. Rotodaro, M. Terry, K. Brennan, S.W. Aur, J.C. Hu, H.L. Tsai, P. Jones, G. Wilk, M. Aoki, M. Rodder and I.C. Chen, Tech. Dig. – Int. Electron Devices Meet. 1998, 777.
    24. E.P. Gusev et al., Tech. Dig. – Int. Electron Devices Meet. 2001, 451.
    25. Y. Morisaki, T. Aoyama, Y. Sugita, K. Irino, T. Sugii and T. Nakamura, Tech. Dig. – Int. Electron Devices Meet. 2002, 861.
    26. S. B. Samavedam et al., Symposium on VLSI Technology, 2002, 24.
    27. S.A. Campbell, D.C. Gilmer, X.C. Wang, M.T. Hsieh, H.S. Kim, W.L. Gladfelter and J. Yan, IEEE Trans. Electron Devices, 44, 104 (1997).
    28. R. Nieh et at., Symposium on VLSI Technology, 2002, 186.
    29. J.H. Yoo et al., IEEE ISSCC, 378 (1996).
    30. K.C. Lee, H. Yoon, S.B. Lee, J.H. Lee, B.S. Moon, K.Y. Kim, C.H. kim and S.I. Cho, Symp. Symposium on VLSI Technology, 1997, 103.
    31. K.N. Kim, H.S. Jeong, G.T. Jeong, C.H. Cho, W.S. Yang, J.H. Sim, K.H. Lee, G.H. Koh, D.W. Ha, J.S. Bae, J.G. Lee, B.J. Park and J.G. Lee, Symposium on VLSI Technology, 1998, 16.
    32. H. Yoon, G.W. Cha, C.S. Yoo, N.J. Kim, K.Y. Kim, C.H. Lee, K.N., IEEE ISSCC, 412 (1999).
    33. M. Hamada, K. Inoue, R. Kubota, M. Takeuchi, M. Sakao, H. Abiko, H. Kawamoto, H. Yamaguchi, H. Kitamura, S. Onishi, K. Mikagi, K. Urabe, T. Taguwa, T. Yamamoto, N. Nagai, I. Shirakawa and S. Kishi, Tech. Dig. – Int. Electron Devices Meet. 1999, 45.
    34. Y. Takai et al., IEEE ISSCC, 418 (1999).
    35. S. Wolf, Silicon processing for the VLSI era: Vol. 4 – Deep-Submicron Process Technology, Lattice Press, Sunset Beach CA, 2002, p146, 170.
    36. G. F. Derbenwick and A. F. Isaacson, IEEE Circutis & Device Magazine, January 2001, p.20-30.
    37. B. Yu, D.-H. Ju, W.-C. Lee, N. Kepler, S.-J. King, and C. Hu, IEEE Trans. Electron Devices, 45, 1253 (1998).
    38. J. L. Hoyt, H. M. Nayfeh, S. Eguchi, I. Aberg, G. Xia, T. Drake, E. A. Fitzgerald and D. A. Antoniadis, Tech. Dig. – Int. Electron Devices Meet. 2002, 23.
    39. K. Rim, S. Koester, M. Hargrove, J. Chu, P. M. Mooney and J. Ott, Symposium on VLSI Technology, 2001, 59.
    40. K. Ota, K. Sugihara, H. Sayama, T. Uchida, H. Oda, T. Eimori, H. Morimoto and Y. Inoue, Tech. Dig. – Int. Electron Devices Meet. 2002, 27.
    41. A. Shimizu, K. Hachimine, N. Ohki, H. Ohta, M. Koguchi, Y. Nonaka, H. Sato and F. Ootsuka, Tech. Dig. – Int. Electron Devices Meet. 2001, 433.
    42. S. Thompson et al., Tech. Dig. – Int. Electron Devices Meet. 2002, 61.
    43. A. Chatterjee et al., Tech. Dig. – Int. Electron Devices Meet. 1997, 821.
    44. S. Datta, J. Brask, G. Dewey, M. Doczy, B. Doyle, B. Jin, J. Kavalieros, M. Metz, A. Majumdar, M. Radosavljevic and R. Chau, IEEE Bipolar/BiCMOS Circuits and Technology (BCTM), 194 (2004).
    45. T. Hori, Gate dielectrics and MOS ULSIs: principles, technologies, and applications, Springer, Berlin, 1997, p8, 45.
    46. J. M. Hergenrother et al., Tech. Dig. – Int. Electron Devices Meet. 2001, 51.
    47. S.-H. Oh et al., Tech. Dig. – Int. Electron Devices Meet. 2000, 65.
    48. S. Datta et al., Tech. Dig. – Int. Electron Devices Meet. 2003, 653.
    49. C. Hu, Tech. Dig. – Int. Electron Devices Meet. 1996, 319.
    50. B. Cheng, M Cao, R. Rao, A. Inani, P. V. Voorde, W. M. Greene, J. M. C. Stork, Z. Yu, P. M. Zeitzoff and J. C. S. Woo, IEEE Trans. Electron Devices, 46, 1537 (1999).
    51. D. G. Schlom and J. H. Haeni, Mater. Research. Soc. 27, 198 (2002).
    52. C. H. Choi, S. J. Rhee, T. S. Jeon, N. Lu, J. H. Sim, R. Clark, M. Niwa and D. L. Kwong, Tech. Dig. – Int. Electron Devices Meet. 2002, 857.
    53. T. Yamaguchi, R. Iijima, T. Ino, A. Nishiyama, H. Satake and N. Fukushima, Tech. Dig. – Int. Electron Devices Meet. 2002, 621.
    54. M. Copel, M. Gribelyuk and E. Gusev, Appl. Phys. Lett. 76, 436 (2000).
    55. C. Hobbs et al., Symposium on VLSI Technology, 2001, 204.
    56. T. Ma et al., IEEE Trans. Electron Devices, 48, 2348 (2001).
    57. K. Onishi et al., Symposium on VLSI Technology, 2001, 131.
    58. W. Zhu, T. P. Ma, T. Tamagawa, Y. Di, J. Kim, R. Carruthers, M. Gibson and T. Furukawa, Tech. Dig. – Int. Electron Devices Meet. 2001, 463.
    59. W. J. Zhu, T. Tamagawa, M. Gibson, T. Furukawa and T. P. Ma, IEEE Electron Device Lett. 23, 649, (2002).
    60. Fu-Chien Chiu, Shun-An Lin and Joseph Ya-min Lee, Microelectronics and Reliability, 45, 961 (2005).
    61. M. Koyama, K. Suguro, M. Yoshiki, Y. Kamimuta, M. Koike, M. Ohse, C. Hongo and A. Nishiyama, Tech. Dig. – Int. Electron Devices Meet. 2001, 459.
    62. H. –J. Cho, C. S. Kang, K. Onishi, S. Gopalan, R. Nieh, R. Choi, E. Dharmarajan and J. C. Lee, Tech. Dig. – Int. Electron Devices Meet. 2001, 655.
    63. C. S. Kang, H. –J. Cho, K. Onishi, R. Choi, Y. H. Kim, R. Nieh, J. Han, S. Krishnan, A. Shahriar and J. C. Lee, Tech. Dig. – Int. Electron Devices Meet. 2001, 865.
    64. M. Koyama et al., Tech. Dig. – Int. Electron Devices Meet. 2002, 849.
    65. A. Shanware, J. McPherson, M. R. Visokay, J. J. Chambers, A. L. P. Rotondaro, H. Bu, M. J. Bevan, R. Khamankar and L. Colombo, Tech. Dig. – Int. Electron Devices Meet. 2001, 137.
    66. A. L. P. Rotondaro et al., Symposium on VLSI Technology, 2002, 148.
    67. Y. Ma, Y. Ono, L. Stecker, D. R. Evans and S. T. Hsu, Tech. Dig. – Int. Electron Devices Meet. 1999, 149.
    68. C. H. Lee, H. F. Luan, W. P. Bai, S. J. Lee, T. S. Jeon, Y. Senzaki, D. Roberts and D. L. Kwong., Tech. Dig. – Int. Electron Devices Meet. 2000, 27.
    69. M. L. Green, E. P. Gusev, R. Degraeve and E. L. Garfunkel, J. Appl. Phys. 90, 2057 (2001), and references therein.
    70. F. C. Chiu, Z. H. Lin, C. W. Chang, C. C. Wang, K. F. Chuang, C. Y. Huang, J. Y. Lee and H. L. Hwang, J. Appl. Phys. 97 , 034506 (2005).
    71. K. Onishi, C. S. Kang, R. Choi, H. J. Cho, S. Gopalan, R. Nieh, S. Krishnan and J. C. Lee, Symposium on VLSI Technology, 2002, 22.
    72. R. Choi, K. Onishi, C. S. Kang, S. Gopalan, R. Nieh, Y. H. Kim, J. H. Han, S. Krishnan, H. J. Cho, A. Shahriar and J. C. Lee, Tech. Dig. – Int. Electron Devices Meet. 2002, 613.
    73. K. Kimizuka, K. Yamaguchi, K. Imai, T. Iizuka, C. T. Liu, R. C. Keller and T. Horiuchi, Symposium on VLSI Technology, 2000, 92.
    74. K. Hess, I. C. Kizilyalli and J. W. Lyding, IEEE Trans. Electron Devices, 45, 406 (1998).
    75. Y.-C. Yeo, P. Ranade, Q. Lu, R. Lin, T.-J. King and C. Hu, Symposium on VLSI Technology, 2002, 49.
    76. R. Lin, Q. Lu, P. Ranade, T.-J. King and C. Hu, IEEE Electron Device Lett. 23, 49, (2002).
    77. I. Polishchuk, P. Ranade, T.-J. King and C. Hu, IEEE Electron Device Lett. 22, 444, (2001).
    78. H. Wakabayashi, Y. Saito, K. Takeuchi, T. Mogami and T. Kunio, Tech. Dig. – Int. Electron Devices Meet. 1999, 253.
    79. H. Wakabayashi, Y. Saito, K. Takeuchi, T. Mogami and T. Kunio, IEEE Trans. Electron Devices, 48, 2363 (2001).
    80. F. C. Chiu, H. W. Chou and J. Y. Lee, J. Appl. Phys. 97, 103503-1~5 (2005).
    81. V. Misra, G. Lucovsky and G. Parsons, Mater. Research. Soc. 27, 212 (2002).
    82. B. H. Lee et al., Tech. Dig. – Int. Electron Devices Meet. 2000, 39.
    83. J. W. McPherson and H. C. Mogul, J. Appl. Phys. 84, 1513 (1998).
    84. J. W. McPherson, R. B. Khamankar and A. Shanware, J. Appl. Phys. 88, 5351 (2000).
    85. S. J. Lee, S. J. Rhee, R. Clark and D. L. Kwong, Symposium on VLSI Technology, 2002, 78.
    86. R. Degraeve, G. Groeseneken, R. Bellens, M. Depas and H. E. Maes, Tech. Dig. – Int. Electron Devices Meet. 1995, 863.
    87. R. Degraeve, G. Groeseneken, R. Bellens, J. L. Ogier, M. Depas, P. J. Roussel and H. E. Maes, IEEE Trans. Electron Devices, 45, 904 (1998).
    88. R. Degraeve, E. Cartier, T. Kauerauf, R. Carter, L. Pantisano, A. Kerber and G. Groeseneken, Mater. Research. Soc. 27, 222 (2002).
    89. H. Lee, S. Jeon and H. Hwang, Appl. Phys. Lett. 79, 2615 (2001).
    90. M. Cho, H. B. Park, J. Park, and C. S. Hwang, J. Appl. Phys. 94, 2563 (2003).
    91. G. D. Wilk, R. M. Wallace, and J. M. Anthony, J. Appl. Phys. 87, 484, (2000).
    92. K. P. Bastos, J. Morais, L. Miotti, R. P. Pezzi, G. V. Soares, I. J. R. Baumvol, R. I. Hegde, H. H. Tseng, and P. J. Tobin, Appl. Phys. Lett. 81, 1669 (2002).
    93. M. H. Cho, Y. S. Roh, C. N. Whang, K. Jeong, S. W. Nahm, D. H. Ko, J. H. Lee, N. I. Lee, and K. Fujihara, Appl. Phys. Lett. 81, 472, (2002).
    94. M. Houssa, M. Tuominen, M. Naili, V. Afanas’ev, A. Stesmans, S. Haukka, M. M. Heyns, J. Appl. Phys. 87, 8615 (2000).
    95. M. Balog, M. Schieber, M. Michman, and S. Patai, Thin Solid Films, 41, 247 (1977).
    96. H. Watanable, Appl. Phys. Lett. 78, 3803 (2001).
    97. J. P. Chang and Y.S. Lin, Appl. Phys. Lett. 79, 3666 (2001).
    98. S. Zafar, R. E. Jones, B. Jiang, B. White, V. Kaushik, and S. Gillespie, Appl. Phys. Lett. 73, 3533 (1998).
    99. J. G. Simmons, Phys. Rev. Lett. 15, 967 (1965).
    100. W. J. Zhu, Tso-Ping Ma, Takashi Tamagawa, J. Kim, and Y. Di, IEEE Electron Device Lett. 23, 97, (2002).
    101. Y. Kim, A. Kuriyama, I. Ueda, S. Ohmi, K. Tsutsui and H. Iwai, ESSDERC, 2003, p. 569.
    102. K.C. Kao, and W. Hwang, Electrical Transport in Solids (Pergamon, New York, 1981).
    103. P. Mark, and W. Helfrich, J. Appl. Phys. 33, 205 (1965).
    104. M.A. Lampert and P. Mark, Current Injection in Solids (Academic, New York, 1970).
    105. M.A. Lampert, Phys. Rev. 103, 1648 (1956).
    106. P. Hesto, “The nature of electronic conduction in thin insulating films” in Instabilities in Silicon Devices: Silicon Passivation and Related Instabilities, edited by G. Barbottin and A. Vapaille, 1th ed. (Elsevier Science, North Holland, 1986), p. 306.
    107. C. T. Sah, Fundamentals of Solid-State Electronics, Singapore: World Scientific, 1991, p. 661.
    108. A. S. Grove and D. J. Fitzgerald, Solid State Electron. 9, 783 (1966).
    109. P. L. Castro, and B. E. Doal, J. Electrochem. Soc. Solid State Science, 118, 280 (1971).
    110. P. C. T. Roberts And J. D. E. Beynon, Solid State Electron. 16, 221 (1973).
    111. M. Randolph and L. G. Meiners, J. Electrochem. Soc. 136, 2699 (1989).
    112. T. Giebel And K. Goser, IEEE Electron Device Lett. 10, 76, (1989).
    113. A. S. Grove, Physics and Technology of Semiconductor Devices, Wiley, New York, 1967, p. 145.
    114. W.-J. Qi et al., Symposium on VLSI Technology, 2000, 40.
    115. W.-J. Qi et al., IEEE International Reliability Physics Symposium, 2000, pp. 72.
    116. L. Manchanda et al., Tech. Dig. – Int. Electron Devices Meet. 2000, 23.
    117. Z. J. Luo, T. P. Ma, E. Cartier, M. Copel, T. Tamagawa and B. Halpern, Symposium on VLSI Technology, 2001, 135.
    118. D. Barlage, R. Arghavani, G. Dewey, M. Doczy, B. Doyle, J. Kavalieros, A. Murthy, B. Roberds, P. Stokley and R. Chau, Tech. Dig. – Int. Electron Devices Meet. 2001, 231.
    119. C. O. Chui, H. Kim, D. Chi, B. B. Triplett, P. C. McLntyre and K. C. Saraswat, Tech. Dig. – Int. Electron Devices Meet. 2002, 437.
    120. T. Kauerauf, R. Degraeve, E. Cartier, B. Govoreanu, P. Blomme, B. Kaczer, L. Pantisano, A. Kerber and G. Groeseneken, Tech. Dig. – Int. Electron Devices Meet. 2002, 521.
    121. C. H. Lee, Y. H. Kim, H. F. Luan, S. J. Lee, T. S. Jeon, W. P. Bai and D. L. Kwong, Symposium on VLSI Technology, 2001, 137.
    122. Y. Kim et al., Tech. Dig. – Int. Electron Devices Meet. 2001, 455.
    123. C. Hobbs et al., Tech. Dig. – Int. Electron Devices Meet. 2001, 651.
    124. S.Ohmi, C. Kobayashi, I. Kashiwagi, C. Ohshima, H. Ishiwara and H. Iwai, J. Electrochem. Soc. 150, F134 (2003).
    125. Y. H. Wu, M. Y. Yang, A. Chin, W. J. Chen and C. M. Kwei, IEEE Electron Device Lett. 21, 341, (2000).
    126. C. H. Huang, S. B. Chen and A. Chin, IEEE Electron Device Lett. 23, 710, (2002).
    127. C. Y. Lin, M. W. Ma, A. Chin, Y. C. Yeo, C. Zhu, M. F. Li and D.-L. Kwong, IEEE Electron Device Lett. 24, 348, (2003).
    128. S. W. Kang and S. W. Rhee, J. Electrochem. Soc. 149, C345 (2002).
    129. J. H. Jun, C. H. Wang, D. J. Won and D. J. Choi, J. Korean Phys. Soc. 41, 1 (2002).
    130. H. J. Osten, J. P. Liu, P. Gaworzewski, E. Bugiel and P. Zaumseil, Tech. Dig. – Int. Electron Devices Meet. 2000, 653.
    131. S. Jeon, K. Im, H. Yang, H. Lee, H. Sim, S. Choi, T. Jang and H. Hwang, Tech. Dig. – Int. Electron Devices Meet. 2001, 471.
    132. F. C. Chiu, J. J. Wang, J. Y. Lee and S. C. Wu, J. Appl. Phys. 81, 6911 (1997).
    133. S. Ezhilvalavan and T.Y. Tseng, J. Appl. Phys. 83 , 4797 (1998).
    134. H. Zhang, R. Solanki, B. Roberds, G. Bai and I. Banerjee, J. Appl. Phys. 87, 1921 (2000).
    135. S. Guha, E. Gusev, M. Copel, L.-A. Ragnarsson and D. A. Buchanan, Mater. Research. Soc. 27, 226 (2002).
    136. S. J. Lee, H. F. Luan, W. P. Bai, C. H. Lee, T. S. Jeon, Y. Senzaki, D. Roberts and D. L. Kwong, Tech. Dig. – Int. Electron Devices Meet. 2000, 31.
    137. A. Chin, C. C. Laio, C. H. Lu, W. J. Chen and C. Tsai, Symposium on VLSI Technology, 1999, 135.
    138. T. Devoivre, C. Papadas and M. Setton, Symposium on VLSI Technology, 1999, 131.
    139. Y. Momiyama et al., Symposium on VLSI Technology, 1997, 135.
    140. I. C. Kizilyalli et al., Symposium on VLSI Technology, 1998, 216.
    141. H. F. Luan et al., Tech. Dig. – Int. Electron Devices Meet. 1998, 609.

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